OVERVIEW: llvm .bc -> .bc modular optimizer and analysis printer
USAGE: opt [options] <input bitcode file>
OPTIONS:
Color Options:
--color - Use colors in output (default=autodetect)
General options:
--O0 - Optimization level 0. Similar to clang -O0. Same as -passes='default<O0>'
--O1 - Optimization level 1. Similar to clang -O1. Same as -passes='default<O1>'
--O2 - Optimization level 2. Similar to clang -O2. Same as -passes='default<O2>'
--O3 - Optimization level 3. Similar to clang -O3. Same as -passes='default<O3>'
--Os - Like -O2 but size-conscious. Similar to clang -Os. Same as -passes='default<Os>'
--Oz - Like -O2 but optimize for code size above all else. Similar to clang -Oz. Same as -passes='default<Oz>'
-S - Write output as LLVM assembly
--aarch64-neon-syntax=<value> - Choose style of NEON code to emit from AArch64 backend:
=generic - Emit generic NEON assembly
=apple - Emit Apple-style NEON assembly
--aarch64-use-aa - Enable the use of AA during codegen.
--abort-on-max-devirt-iterations-reached - Abort when the max iterations for devirtualization CGSCC repeat pass is reached
--addrsig - Emit an address-significance table
--align-loops=<uint> - Default alignment for loops
--allow-ginsert-as-artifact - Allow G_INSERT to be considered an artifact. Hack around AMDGPU test infinite loops.
--amdgpu-atomic-optimizer-strategy=<value> - Select DPP or Iterative strategy for scan
=DPP - Use DPP operations for scan
=Iterative - Use Iterative approach for scan
=None - Disable atomic optimizer
--amdgpu-bypass-slow-div - Skip 64-bit divide for dynamic 32-bit values
--amdgpu-disable-loop-alignment - Do not align and prefetch loops
--amdgpu-dpp-combine - Enable DPP combiner
--amdgpu-dump-hsa-metadata - Dump AMDGPU HSA Metadata
--amdgpu-enable-merge-m0 - Merge and hoist M0 initializations
--amdgpu-enable-power-sched - Enable scheduling to minimize mAI power bursts
--amdgpu-kernarg-preload-count=<uint> - How many kernel arguments to preload onto SGPRs
--amdgpu-promote-alloca-to-vector-limit=<uint> - Maximum byte size to consider promote alloca to vector
--amdgpu-sdwa-peephole - Enable SDWA peepholer
--amdgpu-use-aa-in-codegen - Enable the use of AA during codegen.
--amdgpu-verify-hsa-metadata - Verify AMDGPU HSA Metadata
--amdgpu-vgpr-index-mode - Use GPR indexing mode instead of movrel for vector indexing
--arm-add-build-attributes -
--arm-implicit-it=<value> - Allow conditional instructions outdside of an IT block
=always - Accept in both ISAs, emit implicit ITs in Thumb
=never - Warn in ARM, reject in Thumb
=arm - Accept in ARM, reject in Thumb
=thumb - Warn in ARM, emit implicit ITs in Thumb
--asm-show-inst - Emit internal instruction representation to assembly file
--atomic-counter-update-promoted - Do counter update using atomic fetch add for promoted counters only
--atomic-first-counter - Use atomic fetch add for first counter in a function (usually the entry counter)
--basic-block-sections=<all | <function list (file)> | labels | none> - Emit basic blocks into separate sections
--bounds-checking-single-trap - Use one trap block per function
--bounds-checking-unique-traps - Always use one trap per check
--bpf-stack-size=<int> - Specify the BPF stack size limit
--bugpoint-enable-legacy-pm - Enable the legacy pass manager. This is strictly for bugpoint due to it not working with the new PM, please do not use otherwise.
--cfg-hide-cold-paths=<number> - Hide blocks with relative frequency below the given value
--cfg-hide-deoptimize-paths -
--cfg-hide-unreachable-paths -
--code-model=<value> - Choose code model
=tiny - Tiny code model
=small - Small code model
=kernel - Kernel code model
=medium - Medium code model
=large - Large code model
--codegen-opt-level=<uint> - Override optimization level for codegen hooks, legacy PM only
--cost-kind=<value> - Target cost kind
=throughput - Reciprocal throughput
=latency - Instruction latency
=code-size - Code size
=size-latency - Code size and latency
--cs-profile-generate - Perform context sensitive PGO instrumentation
--cs-profile-path=<string> - Context sensitive profile file path
--data-layout=<layout-string> - data layout string to use
--data-sections - Emit data into separate sections
--debug-entry-values - Enable debug info for the debug entry values.
--debug-info-correlate - Use debug info to correlate profiles. (Deprecated, use -profile-correlate=debug-info)
--debugger-tune=<value> - Tune debug info for a particular debugger
=gdb - gdb
=lldb - lldb
=dbx - dbx
=sce - SCE targets (e.g. PS4)
--debugify-each - Start each pass with debugify and end it with check-debugify
--debugify-export=<filename> - Export per-pass debugify statistics to this file
--debugify-func-limit=<ulong> - Set max number of processed functions per pass.
--debugify-level=<value> - Kind of debug info to add
=locations - Locations only
=location+variables - Locations and Variables
--debugify-quiet - Suppress verbose debugify output
--denormal-fp-math=<value> - Select which denormal numbers the code is permitted to require
=ieee - IEEE 754 denormal numbers
=preserve-sign - the sign of a flushed-to-zero number is preserved in the sign of 0
=positive-zero - denormals are flushed to positive zero
=dynamic - denormals have unknown treatment
--denormal-fp-math-f32=<value> - Select which denormal numbers the code is permitted to require for float
=ieee - IEEE 754 denormal numbers
=preserve-sign - the sign of a flushed-to-zero number is preserved in the sign of 0
=positive-zero - denormals are flushed to positive zero
=dynamic - denormals have unknown treatment
--disable-auto-upgrade-debug-info - Disable autoupgrade of debug info
--disable-builtin=<string> - Disable specific target library builtin function
--disable-debug-info-type-map - Don't use a uniquing type map for debug info
--disable-i2p-p2i-opt - Disables inttoptr/ptrtoint roundtrip optimization
--disable-loop-unrolling - Disable loop unrolling in all relevant passes
--disable-promote-alloca-to-lds - Disable promote alloca to LDS
--disable-promote-alloca-to-vector - Disable promote alloca to vector
--disable-simplify-libcalls - Disable simplify-libcalls
--disable-tail-calls - Never emit tail calls
--do-counter-promotion - Do counter register promotion
--dot-cfg-mssa=<file name for generated dot file> - file name for generated dot file
--dwarf-version=<int> - Dwarf version
--dwarf64 - Generate debugging info in the 64-bit DWARF format
--emit-call-site-info - Emit call site debug information, if debug information is enabled.
--emit-compact-unwind-non-canonical - Whether to try to emit Compact Unwind for non canonical entries.
--emit-dwarf-unwind=<value> - Whether to emit DWARF EH frame entries.
=always - Always emit EH frame entries
=no-compact-unwind - Only emit EH frame entries when compact unwind is not available
=default - Use target platform default
--emscripten-cxx-exceptions-allowed=<string> - The list of function names in which Emscripten-style exception handling is enabled (see emscripten EMSCRIPTEN_CATCHING_ALLOWED options)
--emulated-tls - Use emulated TLS model
--enable-approx-func-fp-math - Enable FP math optimizations that assume approx func
--enable-cse-in-irtranslator - Should enable CSE in irtranslator
--enable-cse-in-legalizer - Should enable CSE in Legalizer
--enable-debugify - Start the pipeline with debugify and end it with check-debugify
--enable-emscripten-cxx-exceptions - WebAssembly Emscripten-style exception handling
--enable-emscripten-sjlj - WebAssembly Emscripten-style setjmp/longjmp handling
--enable-gvn-hoist - Enable the GVN hoisting pass (default = off)
--enable-gvn-memdep -
--enable-gvn-sink - Enable the GVN sinking pass (default = off)
--enable-jmc-instrument - Instrument functions with a call to __CheckForDebuggerJustMyCode
--enable-load-in-loop-pre -
--enable-load-pre -
--enable-loop-simplifycfg-term-folding -
--enable-name-compression - Enable name/filename string compression
--enable-no-infs-fp-math - Enable FP math optimizations that assume no +-Infs
--enable-no-nans-fp-math - Enable FP math optimizations that assume no NaNs
--enable-no-signed-zeros-fp-math - Enable FP math optimizations that assume the sign of 0 is insignificant
--enable-no-trapping-fp-math - Enable setting the FP exceptions build attribute not to use exceptions
--enable-split-backedge-in-load-pre -
--enable-split-loopiv-heuristic - Enable loop iv regalloc heuristic
--enable-tlsdesc - Enable the use of TLS Descriptors
--enable-unsafe-fp-math - Enable optimizations that may decrease FP precision
--exception-model=<value> - exception model
=default - default exception handling model
=dwarf - DWARF-like CFI based exception handling
=sjlj - SjLj exception handling
=arm - ARM EHABI exceptions
=wineh - Windows exception model
=wasm - WebAssembly exception handling
--experimental-debug-variable-locations - Use experimental new value-tracking variable locations
--experimental-debuginfo-iterators - Enable communicating debuginfo positions through iterators, eliminating intrinsics
-f - Enable binary output on terminals
--fatal-warnings - Treat warnings as errors
--filetype=<value> - Choose a file type (not all types are supported by all targets):
=asm - Emit an assembly ('.s') file
=obj - Emit a native object ('.o') file
=null - Emit nothing, for performance testing
--float-abi=<value> - Choose float ABI type
=default - Target default float ABI type
=soft - Soft float ABI (implied by -soft-float)
=hard - Hard float ABI (uses FP registers)
--force-dwarf-frame-section - Always emit a debug frame section.
--force-tail-folding-style=<value> - Force the tail folding style
=none - Disable tail folding
=data - Create lane mask for data only, using active.lane.mask intrinsic
=data-without-lane-mask - Create lane mask with compare/stepvector
=data-and-control - Create lane mask using active.lane.mask intrinsic, and use it for both data and control flow
=data-and-control-without-rt-check - Similar to data-and-control, but remove the runtime check
--fp-contract=<value> - Enable aggressive formation of fused FP ops
=fast - Fuse FP ops whenever profitable
=on - Only fuse 'blessed' FP ops.
=off - Only fuse FP ops when the result won't be affected.
--frame-pointer=<value> - Specify frame pointer elimination optimization
=all - Disable frame pointer elimination
=non-leaf - Disable frame pointer elimination for non-leaf frame
=none - Enable frame pointer elimination
--fs-profile-debug-bw-threshold=<uint> - Only show debug message if the source branch weight is greater than this value.
--fs-profile-debug-prob-diff-threshold=<uint> - Only show debug message if the branch probility is greater than this value (in percentage).
--function-sections - Emit functions into separate sections
--generate-merged-base-profiles - When generating nested context-sensitive profiles, always generate extra base profile for function with all its context profiles merged into it.
--gpsize=<uint> - Global Pointer Addressing Size. The default size is 8.
--hash-based-counter-split - Rename counter variable of a comdat function based on cfg hash
--hexagon-rdf-limit=<uint> -
--hot-cold-split - Enable hot-cold splitting pass
--ignore-xcoff-visibility - Not emit the visibility attribute for asm in AIX OS or give all symbols 'unspecified' visibility in XCOFF object file
--import-all-index - Import all external functions in index.
--incremental-linker-compatible - When used with filetype=obj, emit an object file which can be used with an incremental linker
--instcombine-code-sinking - Enable code sinking
--instcombine-guard-widening-window=<uint> - How wide an instruction window to bypass looking for another guard
--instcombine-max-num-phis=<uint> - Maximum number phis to handle in intptr/ptrint folding
--instcombine-max-sink-users=<uint> - Maximum number of undroppable users for instruction sinking
--instcombine-maxarray-size=<uint> - Maximum array size considered when doing a combine
--instcombine-negator-enabled - Should we attempt to sink negations?
--instcombine-negator-max-depth=<uint> - What is the maximal lookup depth when trying to check for viability of negation sinking.
--instrprof-atomic-counter-update-all - Make all profile counter updates atomic (for testing only)
--internalize-public-api-file=<filename> - A file containing list of symbol names to preserve
--internalize-public-api-list=<list> - A list of symbol names to preserve
--iterative-counter-promotion - Allow counter promotion across the whole loop nest.
--large-data-threshold=<ulong> - Choose large data threshold for x86_64 medium code model
--load=<pluginfilename> - Load the specified plugin
--load-pass-plugin=<string> - Load passes from plugin library
Optimizations available (use '-passes=' for the new pass manager)
--aa - Function Alias Analysis Results
--aarch64-O0-prelegalizer-combiner - Combine AArch64 machine instrs before legalization
--aarch64-a57-fp-load-balancing - AArch64 A57 FP Load-Balancing
--aarch64-branch-targets - AArch64 Branch Targets
--aarch64-ccmp - AArch64 CCMP Pass
--aarch64-collect-loh - AArch64 Collect Linker Optimization Hint (LOH)
--aarch64-condopt - AArch64 CondOpt Pass
--aarch64-copyelim - AArch64 redundant copy elimination pass
--aarch64-dead-defs - AArch64 Dead register definitions
--aarch64-expand-pseudo - AArch64 pseudo instruction expansion pass
--aarch64-falkor-hwpf-fix - Falkor HW Prefetch Fix
--aarch64-falkor-hwpf-fix-late - Falkor HW Prefetch Fix Late Phase
--aarch64-fix-cortex-a53-835769-pass - AArch64 fix for A53 erratum 835769
--aarch64-globals-tagging - AArch64 Globals Tagging Pass
--aarch64-isel - AArch64 Instruction Selection
--aarch64-jump-tables - AArch64 compress jump tables pass
--aarch64-ldst-opt - AArch64 load / store optimization pass
--aarch64-lit - Transform specific loop idioms into optimized vector forms
--aarch64-local-dynamic-tls-cleanup - AArch64 Local Dynamic TLS Access Clean-up
--aarch64-lower-homogeneous-prolog-epilog - AArch64 homogeneous prolog/epilog lowering pass
--aarch64-mi-peephole-opt - AArch64 MI Peephole Optimization
--aarch64-post-select-optimize - Optimize AArch64 selected instructions
--aarch64-postlegalizer-combiner - Combine AArch64 MachineInstrs after legalization
--aarch64-postlegalizer-lowering - Lower AArch64 MachineInstrs after legalization
--aarch64-prelegalizer-combiner - Combine AArch64 machine instrs before legalization
--aarch64-promote-const - AArch64 Promote Constant Pass
--aarch64-ptrauth - AArch64 Pointer Authentication
--aarch64-simd-scalar - AdvSIMD Scalar Operation Optimization
--aarch64-simdinstr-opt - AArch64 SIMD instructions optimization pass
--aarch64-sls-hardening - AArch64 sls hardening pass
--aarch64-sme-abi - SME ABI Pass
--aarch64-speculation-hardening - AArch64 speculation hardening pass
--aarch64-stack-tagging - AArch64 Stack Tagging
--aarch64-stack-tagging-pre-ra - AArch64 Stack Tagging PreRA Pass
--aarch64-stp-suppress - AArch64 Store Pair Suppression
--aarch64-sve-intrinsic-opts - SVE intrinsics optimizations
--alloca-hoisting - Hoisting alloca instructions in non-entry blocks to the entry block
--always-inline - Inliner for always_inline functions
--amdgpu-aa - AMDGPU Address space based Alias Analysis
--amdgpu-aa-wrapper - AMDGPU Address space based Alias Analysis Wrapper
--amdgpu-always-inline - AMDGPU Inline All Functions
--amdgpu-annotate-kernel-features - Add AMDGPU function attributes
--amdgpu-annotate-uniform - Add AMDGPU uniform metadata
--amdgpu-argument-reg-usage-info - Argument Register Usage Information Storage
--amdgpu-atomic-optimizer - AMDGPU atomic optimizations
--amdgpu-attributor - AMDGPU Attributor
--amdgpu-codegenprepare - AMDGPU IR optimizations
--amdgpu-global-isel-divergence-lowering - AMDGPU GlobalISel divergence lowering
--amdgpu-image-intrinsic-opt - AMDGPU Image Intrinsic Optimizer
--amdgpu-insert-delay-alu - AMDGPU Insert Delay ALU
--amdgpu-insert-single-use-vdst - AMDGPU Insert SingleUseVDST
--amdgpu-isel - AMDGPU DAG->DAG Pattern Instruction Selection
--amdgpu-late-codegenprepare - AMDGPU IR late optimizations
--amdgpu-lower-ctor-dtor - Lower ctors and dtors for AMDGPU
--amdgpu-lower-enqueued-block - Lower OpenCL enqueued blocks
--amdgpu-lower-kernel-arguments - AMDGPU Lower Kernel Arguments
--amdgpu-lower-kernel-attributes - AMDGPU Kernel Attributes
--amdgpu-lower-module-lds - Lower uses of LDS variables from non-kernel functions
--amdgpu-mark-last-scratch-load - AMDGPU Mark last scratch load
--amdgpu-nsa-reassign - GCN NSA Reassign
--amdgpu-perf-hint - Analysis if a function is memory bound
--amdgpu-postlegalizer-combiner - Combine AMDGPU machine instrs after legalization
--amdgpu-pre-ra-long-branch-reg - AMDGPU Pre-RA Long Branch Reg
--amdgpu-pre-ra-optimizations - Pre-RA optimizations
--amdgpu-prelegalizer-combiner - Combine AMDGPU machine instrs before legalization
--amdgpu-print-rp -
--amdgpu-printf-runtime-binding - AMDGPU Printf lowering
--amdgpu-promote-alloca - AMDGPU promote alloca to vector or LDS
--amdgpu-promote-alloca-to-vector - AMDGPU promote alloca to vector
--amdgpu-promote-kernel-arguments - AMDGPU Promote Kernel Arguments
--amdgpu-regbank-combiner - Combine AMDGPU machine instrs after regbankselect
--amdgpu-regbankselect - AMDGPU Register Bank Select
--amdgpu-remove-incompatible-functions - AMDGPU Remove Incompatible Functions
--amdgpu-resource-usage - Function register usage analysis
--amdgpu-rewrite-out-arguments - AMDGPU Rewrite Out Arguments
--amdgpu-rewrite-undef-for-phi - Rewrite undef for PHI
--amdgpu-unify-divergent-exit-nodes - Unify divergent function exit nodes
--amdgpu-unify-metadata - Unify multiple OpenCL metadata due to linking
--amode-opt - Optimize addressing mode
--arm-block-placement - ARM block placement
--arm-branch-targets - ARM Branch Targets
--arm-cp-islands - ARM constant island placement and branch shortening pass
--arm-execution-domain-fix - ARM Execution Domain Fix
--arm-fix-cortex-a57-aes-1742098 - ARM fix for Cortex-A57 AES Erratum 1742098
--arm-isel - ARM Instruction Selection
--arm-ldst-opt - ARM load / store optimization pass
--arm-low-overhead-loops - ARM Low Overhead Loops pass
--arm-mve-gather-scatter-lowering - MVE gather/scattering lowering pass
--arm-mve-vpt - ARM MVE VPT block pass
--arm-mve-vpt-opts - ARM MVE TailPred and VPT Optimisations pass
--arm-parallel-dsp - Transform functions to use DSP intrinsics
--arm-prera-ldst-opt - ARM pre- register allocation load / store optimization pass
--arm-pseudo - ARM pseudo instruction expansion pass
--arm-sls-hardening - ARM sls hardening pass
--assumption-cache-tracker - Assumption Cache Tracker
--atomic-expand - Expand Atomic instructions
--avr-expand-pseudo - AVR pseudo instruction expansion pass
--avr-isel - AVR DAG->DAG Instruction Selection
--avr-shift-expand - AVR Shift Expansion
--barrier - A No-Op Barrier Pass
--basic-aa - Basic Alias Analysis (stateless AA impl)
--basiccg - CallGraph Construction
--bbsections-profile-reader - Reads and parses a basic block sections profile.
--block-freq - Block Frequency Analysis
--bpf-check-and-opt-ir - BPF Check And Adjust IR
--bpf-isel - BPF DAG->DAG Pattern Instruction Selection
--bpf-mi-zext-elim - BPF MachineSSA Peephole Optimization For ZEXT Eliminate
--branch-prob - Branch Probability Analysis
--break-crit-edges - Break critical edges in CFG
--callbrprepare - Prepare callbr
--canon-freeze - Canonicalize Freeze Instructions in Loops
--check-debugify - Check debug info from -debugify
--check-debugify-function - Check debug info from -debugify-function
--codegenprepare - Optimize for code generation
--consthoist - Constant Hoisting
--cseinfo - Analysis containing CSE Info
--cycles - Cycle Info Analysis
--da - Dependence Analysis
--dce - Dead Code Elimination
--deadargelim - Dead Argument Elimination
--deadarghaX0r - Dead Argument Hacking (BUGPOINT USE ONLY; DO NOT USE)
--debugify - Attach debug info to everything
--debugify-function - Attach debug info to a function
--domfrontier - Dominance Frontier Construction
--domtree - Dominator Tree Construction
--dot-callgraph - Print call graph to 'dot' file
--dot-dom - Print dominance tree of function to 'dot' file
--dot-dom-only - Print dominance tree of function to 'dot' file (with no function bodies)
--dot-postdom - Print postdominance tree of function to 'dot' file
--dot-postdom-only - Print postdominance tree of function to 'dot' file (with no function bodies)
--dot-regions - Print regions of function to 'dot' file
--dot-regions-only - Print regions of function to 'dot' file (with no function bodies)
--dwarf-eh-prepare - Prepare DWARF exceptions
--early-cse - Early CSE
--early-cse-memssa - Early CSE w/ MemorySSA
--edge-bundles - Bundle Machine CFG Edges
--expand-large-div-rem - Expand large div/rem
--expand-large-fp-convert - Expand large fp convert
--expand-memcmp - Expand memcmp() to load/stores
--expand-reductions - Expand reduction intrinsics
--expandvp - Expand vector predication intrinsics
--external-aa - External Alias Analysis
--fastpretileconfig - Fast Tile Register Preconfigure
--fasttileconfig - Fast Tile Register Configure
--fix-irreducible - Convert irreducible control-flow into natural loops
--flattencfg - Flatten the CFG
--gcn-create-vopd - GCN Create VOPD Instructions
--gcn-dpp-combine - GCN DPP Combine
--generic-to-nvvm - Ensure that the global variables are in the global address space
--gisel-known-bits - Analysis for ComputingKnownBits
--global-merge - Merge global variables
--globals-aa - Globals Alias Analysis
--gvn - Global Value Numbering
--hexagon-bit-simplify - Hexagon bit simplification
--hexagon-cext-opt - Hexagon constant-extender optimization
--hexagon-constp - Hexagon Constant Propagation
--hexagon-copy-combine - Hexagon Copy-To-Combine Pass
--hexagon-early-if - Hexagon early if conversion
--hexagon-gen-mux - Hexagon generate mux instructions
--hexagon-isel - Hexagon DAG->DAG Pattern Instruction Selection
--hexagon-loop-idiom - Recognize Hexagon-specific loop idioms
--hexagon-nvj - Hexagon NewValueJump
--hexagon-packetizer - Hexagon Packetizer
--hexagon-rdf-opt - Hexagon RDF optimizations
--hexagon-split-double - Hexagon Split Double Registers
--hexagon-vc - Hexagon Vector Combine
--hexagon-vextract - Hexagon optimize vextract
--hexagon-vlcr - Hexagon-specific predictive commoning for HVX vectors
--hwloops - Hexagon Hardware Loops
--indirectbr-expand - Expand indirectbr instructions
--infer-address-spaces - Infer address spaces
--instcombine - Combine redundant instructions
--instruction-select - Select target instructions out of generic instructions
--instsimplify - Remove redundant instructions
--interleaved-access - Lower interleaved memory accesses to target specific intrinsics
--interleaved-load-combine - Combine interleaved loads into wide loads and shufflevector instructions
--intervals - Interval Partition Construction
--ir-similarity-identifier - ir-similarity-identifier
--irtranslator - IRTranslator LLVM IR -> MI
--iv-users - Induction Variable Users
--jmc-instrumenter - Instrument function entry with call to __CheckForDebuggerJustMyCode
--kcfi - Insert KCFI indirect call checks
--lanai-isel - Lanai DAG->DAG Pattern Instruction Selection
--lazy-block-freq - Lazy Block Frequency Analysis
--lazy-branch-prob - Lazy Branch Probability Analysis
--lazy-value-info - Lazy Value Information Analysis
--lcssa - Loop-Closed SSA Form Pass
--lcssa-verification - LCSSA Verifier
--legalizer - Legalize the Machine IR a function's Machine IR
--licm - Loop Invariant Code Motion
--liveintervals - Live Interval Analysis
--liveregmatrix - Live Register Matrix
--livestacks - Live Stack Slot Analysis
--livevars - Live Variable Analysis
--load-store-vectorizer - Vectorize load and store instructions
--loadstore-opt - Generic memory optimizations
--localizer - Move/duplicate certain instructions close to their use
--loongarch-isel - LoongArch DAG->DAG Pattern Instruction Selection
--loongarch-prera-expand-pseudo - LoongArch Pre-RA pseudo instruction expansion pass
--loop-data-prefetch - Loop Data Prefetch
--loop-extract - Extract loops into new functions
--loop-extract-single - Extract at most one loop into a new function
--loop-reduce - Loop Strength Reduction
--loop-rotate - Rotate Loops
--loop-simplify - Canonicalize natural loops
--loop-unroll - Unroll loops
--loops - Natural Loop Information
--lower-amx-intrinsics - Lower AMX intrinsics
--lower-amx-type - Lower AMX type for load/store
--lower-constant-intrinsics - Lower constant intrinsics
--lower-global-dtors - Lower @llvm.global_dtors via `__cxa_atexit`
--loweratomic - Lower atomic intrinsics to non-atomic form
--lowerinvoke - Lower invoke and unwind, for unwindless code generators
--lowerswitch - Lower SwitchInst's to branches
--lowertilecopy - Tile Copy Lowering
--machine-block-freq - Machine Block Frequency Analysis
--machine-branch-prob - Machine Branch Probability Analysis
--machine-cycles - Machine Cycle Info Analysis
--machine-domfrontier - Machine Dominance Frontier Construction
--machine-loops - Machine Natural Loop Construction
--machine-trace-metrics - Machine Trace Metrics
--machinedomtree - MachineDominator Tree Construction
--machinepostdomtree - MachinePostDominator Tree Construction
--mem2reg - Promote Memory to Register
--memdep - Memory Dependence Analysis
--memoryssa - Memory SSA
--mergeicmps - Merge contiguous icmps into a memcmp
--micromips-reduce-size - MicroMips instruction size reduce pass
--mips-branch-expansion - Expand out of range branch instructions and fix forbidden slot hazards
--mips-delay-slot-filler - Fill delay slot for MIPS
--mips-isel - MIPS DAG->DAG Pattern Instruction Selection
--mips-postlegalizer-combiner - Combine Mips machine instrs after legalization
--mips-prelegalizer-combiner - Combine Mips machine instrs before legalization
--mips-vr4300-mulmul-fix - Mips VR4300 mulmul bugfix
--module-summary-analysis - Module Summary Analysis
--module-summary-info - Module summary info
--msp430-isel - MSP430 DAG->DAG Pattern Instruction Selection
--mve-laneinterleave - MVE lane interleaving
--mve-tail-predication - Transform predicated vector loops to use MVE tail predication
--nary-reassociate - Nary reassociation
--nvptx-aa - NVPTX Address space based Alias Analysis
--nvptx-aa-wrapper - NVPTX Address space based Alias Analysis Wrapper
--nvptx-assign-valid-global-names - Assign valid PTX names to globals
--nvptx-atomic-lower - Lower atomics of local memory to simple load/stores
--nvptx-isel - NVPTX DAG->DAG Pattern Instruction Selection
--nvptx-lower-aggr-copies - Lower aggregate copies, and llvm.mem* intrinsics into loops
--nvptx-lower-alloca - Lower Alloca
--nvptx-lower-args - Lower arguments (NVPTX)
--nvptx-lower-ctor-dtor - Lower ctors and dtors for NVPTX
--nvptx-lower-unreachable - Lower Unreachable
--nvptx-proxyreg-erasure - NVPTX ProxyReg Erasure
--nvvm-intr-range - Add !range metadata to NVVM intrinsics.
--nvvm-reflect - Replace occurrences of __nvvm_reflect() calls with 0/1
--opt-remark-emitter - Optimization Remark Emitter
--packets - R600 Packetizer
--partially-inline-libcalls - Partially inline calls to library functions
--phi-values - Phi Values Analysis
--place-backedge-safepoints-impl - Place Backedge Safepoints
--postdomtree - Post-Dominator Tree Construction
--ppc-atomic-expand - PowerPC Expand Atomic
--ppc-bool-ret-to-int - Convert i1 constants to i32/i64 if they are returned
--ppc-branch-coalescing - Branch Coalescing
--ppc-branch-select - PowerPC Branch Selector
--ppc-ctrloops - PowerPC CTR loops generation
--ppc-early-ret - PowerPC Early-Return Creation
--ppc-expand-isel - PowerPC Expand ISEL Generation
--ppc-gen-scalar-mass - Generate Scalar MASS entries
--ppc-isel - PowerPC DAG->DAG Pattern Instruction Selection
--ppc-loop-instr-form-prep - Prepare loop for ppc preferred instruction forms
--ppc-lower-massv-entries - Lower MASSV entries
--ppc-merge-strings - PPC Merge String Pool
--ppc-mi-peepholes - PowerPC MI Peephole Optimization
--ppc-pre-emit-peephole - PowerPC Pre-Emit Peephole
--ppc-reduce-cr-ops - PowerPC Reduce CR logical Operation
--ppc-tls-dynamic-call - PowerPC TLS Dynamic Call Fixup
--ppc-toc-reg-deps - PowerPC TOC Register Dependencies
--ppc-vsx-copy - PowerPC VSX Copy Legalization
--ppc-vsx-fma-mutate - PowerPC VSX FMA Mutation
--ppc-vsx-swaps - PowerPC VSX Swap Removal
--pre-isel-intrinsic-lowering - Pre-ISel Intrinsic Lowering
--print-function - Print function to stderr
--print-module - Print module to stderr
--profile-summary-info - Profile summary info
--pseudo-probe-inserter - Insert pseudo probe annotations for value profiling
--r600-expand-special-instrs - R600ExpandSpecialInstrs
--r600cf - R600 Control Flow Finalizer
--r600mergeclause - R600 Clause Merge
--reaching-deps-analysis - ReachingDefAnalysis
--reassociate - Reassociate expressions
--regbankselect - Assign register bank of generic virtual registers
--regions - Detect single entry single exit regions
--replace-with-veclib - Replace intrinsics with calls to vector library
--rewrite-partial-reg-uses - Rewrite Partial Register Uses
--riscv-O0-prelegalizer-combiner - Combine RISC-V machine instrs before legalization
--riscv-codegenprepare - RISC-V CodeGenPrepare
--riscv-dead-defs - RISC-V Dead register definitions
--riscv-expand-pseudo - RISC-V pseudo instruction expansion pass
--riscv-expand-pseudolisimm32 - RISC-V post-regalloc pseudo instruction expansion pass
--riscv-fold-masks - RISC-V Fold Masks
--riscv-gather-scatter-lowering - RISC-V gather/scatter lowering pass
--riscv-init-undef - RISC-V init undef pass
--riscv-insert-read-write-csr - RISC-V Insert Read/Write CSR Pass
--riscv-insert-vsetvli - RISC-V Insert VSETVLI pass
--riscv-insert-write-vxrm - RISC-V Insert Write VXRM Pass
--riscv-isel - RISC-V DAG->DAG Pattern Instruction Selection
--riscv-make-compressible - RISC-V Make Compressible
--riscv-merge-base-offset - RISC-V Merge Base Offset
--riscv-move-merge - RISC-V Zcmp move merging pass
--riscv-opt-w-instrs - RISC-V Optimize W Instructions
--riscv-postlegalizer-combiner - Combine RISC-V MachineInstrs after legalization
--riscv-prelegalizer-combiner - Combine RISC-V machine instrs before legalization
--riscv-prera-expand-pseudo - RISC-V Pre-RA pseudo instruction expansion pass
--riscv-push-pop-opt - RISC-V Zcmp Push/Pop optimization pass
--safe-stack - Safe Stack instrumentation pass
--scalar-evolution - Scalar Evolution Analysis
--scalarize-masked-mem-intrin - Scalarize unsupported masked memory intrinsics
--scev-aa - ScalarEvolution-based Alias Analysis
--scoped-noalias-aa - Scoped NoAlias Alias Analysis
--select-optimize - Optimize selects
--separate-const-offset-from-gep - Split GEPs to a variadic base and a constant offset for better CSE
--si-annotate-control-flow - Annotate SI Control Flow
--si-fix-sgpr-copies - SI Fix SGPR copies
--si-fix-vgpr-copies - SI Fix VGPR copies
--si-fold-operands - SI Fold Operands
--si-form-memory-clauses - SI Form memory clauses
--si-i1-copies - SI Lower i1 Copies
--si-insert-hard-clauses - SI Insert Hard Clauses
--si-insert-waitcnts - SI Insert Waitcnts
--si-late-branch-lowering - SI insert s_cbranch_execz instructions
--si-load-store-opt - SI Load Store Optimizer
--si-lower-control-flow - SI lower control flow
--si-lower-sgpr-spills - SI lower SGPR spill instructions
--si-lower-wwm-copies - SI Lower WWM Copies
--si-memory-legalizer - SI Memory Legalizer
--si-mode-register - Insert required mode register values
--si-opt-vgpr-liverange - SI Optimize VGPR LiveRange
--si-optimize-exec-masking - SI optimize exec mask operations
--si-optimize-exec-masking-pre-ra - SI optimize exec mask operations pre-RA
--si-peephole-sdwa - SI Peephole SDWA
--si-post-ra-bundler - SI post-RA bundler
--si-pre-allocate-wwm-regs - SI Pre-allocate WWM Registers
--si-pre-emit-peephole - SI peephole optimizations
--si-shrink-instructions - SI Shrink Instructions
--si-wqm - SI Whole Quad Mode
--simplifycfg - Simplify the CFG
--sink - Code sinking
--sjlj-eh-prepare - Prepare SjLj exceptions
--slotindexes - Slot index numbering
--slsr - Straight line strength reduction
--sparc-isel - SPARC DAG->DAG Pattern Instruction Selection
--speculative-execution - Speculatively execute instructions
--sroa - Scalar Replacement Of Aggregates
--stack-protector - Insert stack protectors
--stack-safety - Stack Safety Analysis
--stack-safety-local - Stack Safety Local Analysis
--structurizecfg - Structurize the CFG
--systemz-elim-compare - SystemZ Comparison Elimination
--systemz-isel - SystemZ DAG->DAG Pattern Instruction Selection
--systemz-ld-cleanup - SystemZ Local Dynamic TLS Access Clean-up
--systemz-long-branch - SystemZ Long Branch
--systemz-post-rewrite - SystemZ Post Rewrite pass
--systemz-shorten-inst - SystemZ Instruction Shortening
--systemz-tdc - SystemZ Test Data Class optimization
--tailcallelim - Tail Call Elimination
--targetlibinfo - Target Library Information
--targetpassconfig - Target Pass Configuration
--tbaa - Type-Based Alias Analysis
--thumb2-reduce-size - Thumb2 instruction size reduce pass
--tileconfig - Tile Register Configure
--tilepreconfig - Tile Register Pre-configure
--tlshoist - TLS Variable Hoist
--tti - Target Transform Information
--uniformity - Uniformity Analysis
--unify-loop-exits - Fixup each natural loop to have a single exit block
--unreachable-mbb-elimination - Remove unreachable machine basic blocks
--unreachableblockelim - Remove unreachable blocks from the CFG
--ve-isel - VE DAG->DAG Pattern Instruction Selection
--vec-merger - R600 Vector Reg Merger
--verify - Module Verifier
--verify-safepoint-ir - Safepoint IR Verifier
--view-callgraph - View call graph
--view-dom - View dominance tree of function
--view-dom-only - View dominance tree of function (with no function bodies)
--view-postdom - View postdominance tree of function
--view-postdom-only - View postdominance tree of function (with no function bodies)
--view-regions - View regions of function
--view-regions-only - View regions of function (with no function bodies)
--virtregmap - Virtual Register Map
--wasm-add-missing-prototypes - Add prototypes to prototypes-less functions
--wasm-argument-move - Move ARGUMENT instructions for WebAssembly
--wasm-cfg-sort - Reorders blocks in topological order
--wasm-cfg-stackify - Insert BLOCK/LOOP/TRY markers for WebAssembly scopes
--wasm-debug-fixup - Ensures debug_value's that have been stackified become stack relative
--wasm-eh-prepare - Prepare WebAssembly exceptions
--wasm-exception-info - WebAssembly Exception Information
--wasm-explicit-locals - Convert registers to WebAssembly locals
--wasm-fix-br-table-defaults - Removes range checks and sets br_table default targets
--wasm-fix-function-bitcasts - Fix mismatching bitcasts for WebAssembly
--wasm-fix-irreducible-control-flow - Removes irreducible control flow
--wasm-isel - WebAssembly Instruction Selection
--wasm-late-eh-prepare - WebAssembly Late Exception Preparation
--wasm-lower-br_unless - Lowers br_unless into inverted br_if
--wasm-lower-em-ehsjlj - WebAssembly Lower Emscripten Exceptions / Setjmp / Longjmp
--wasm-lower-reftypes-intptr-conv - WebAssembly Lower RefTypes Int-Ptr Conversions
--wasm-mclower-prepass - Collects information ahead of time for MC lowering
--wasm-mem-intrinsic-results - Optimize memory intrinsic result values for WebAssembly
--wasm-nullify-dbg-value-lists - WebAssembly Nullify DBG_VALUE_LISTs
--wasm-optimize-live-intervals - Optimize LiveIntervals for WebAssembly
--wasm-optimize-returned - Optimize calls with "returned" attributes for WebAssembly
--wasm-peephole - WebAssembly peephole optimizations
--wasm-reg-coloring - Minimize number of registers used
--wasm-reg-numbering - Assigns WebAssembly register numbers for virtual registers
--wasm-reg-stackify - Reorder instructions to use the WebAssembly value stack
--wasm-replace-phys-regs - Replace physical registers with virtual registers
--wasm-set-p2align-operands - Set the p2align operands for WebAssembly loads and stores
--win-eh-prepare - Prepare Windows exceptions
--write-bitcode - Write Bitcode
--x86-avoid-SFB - Machine code sinking
--x86-avoid-trailing-call - X86 avoid trailing call pass
--x86-cf-opt - X86 Call Frame Optimization
--x86-cmov-conversion - X86 cmov Conversion
--x86-codegen - X86 FP Stackifier
--x86-compress-evex - Compressing EVEX instrs when possible
--x86-domain-reassignment - X86 Domain Reassignment Pass
--x86-execution-domain-fix - X86 Execution Domain Fix
--x86-fixup-LEAs - X86 LEA Fixup
--x86-fixup-bw-insts - X86 Byte/Word Instruction Fixup
--x86-fixup-setcc - x86-fixup-setcc
--x86-flags-copy-lowering - X86 EFLAGS copy lowering
--x86-isel - X86 DAG->DAG Instruction Selection
--x86-lvi-load - X86 LVI load hardening
--x86-lvi-ret - X86 LVI ret hardener
--x86-optimize-LEAs - X86 optimize LEA pass
--x86-partial-reduction - X86 Partial Reduction
--x86-pseudo - X86 pseudo instruction expansion pass
--x86-return-thunks - X86 Return Thunks
--x86-seses - X86 Speculative Execution Side Effect Suppression
--x86-slh - X86 speculative load hardener
--x86-winehstate - Insert stores for EH state numbers
--x86argumentstackrebase - Argument Stack Rebase
--xcore-isel - XCore DAG->DAG Pattern Instruction Selection
--lto-aix-system-assembler=<path> - Path to a system assembler, picked up on AIX only
--lto-embed-bitcode=<value> - Embed LLVM bitcode in object files produced by LTO
=none - Do not embed
=optimized - Embed after all optimization passes
=post-merge-pre-opt - Embed post merge, but before optimizations
--lto-pass-remarks-filter=<regex> - Only record optimization remarks from passes whose names match the given regular expression
--lto-pass-remarks-format=<format> - The format used for serializing remarks (default: YAML)
--lto-pass-remarks-output=<filename> - Output filename for pass remarks
--march=<string> - Architecture to generate code for (see --version)
--matrix-default-layout=<value> - Sets the default matrix layout
=column-major - Use column-major layout
=row-major - Use row-major layout
--matrix-print-after-transpose-opt -
--mattr=<a1,+a2,-a3,...> - Target specific attributes (-mattr=help for details)
--max-counter-promotions=<int> - Max number of allowed counter promotions
--max-counter-promotions-per-loop=<uint> - Max number counter promotions per loop to avoid increasing register pressure too much
--mc-relax-all - When used with filetype=obj, relax all fixups in the emitted object file
--mcabac - tbd
--mcpu=<cpu-name> - Target a specific cpu type (-mcpu=help for details)
--meabi=<value> - Set EABI type (default depends on triple):
=default - Triple default EABI version
=4 - EABI version 4
=5 - EABI version 5
=gnu - EABI GNU
--merror-missing-parenthesis - Error for missing parenthesis around predicate registers
--merror-noncontigious-register - Error for register names that aren't contigious
--mhvx - Enable Hexagon Vector eXtensions
--mhvx=<value> - Enable Hexagon Vector eXtensions
=v60 - Build for HVX v60
=v62 - Build for HVX v62
=v65 - Build for HVX v65
=v66 - Build for HVX v66
=v67 - Build for HVX v67
=v68 - Build for HVX v68
=v69 - Build for HVX v69
=v71 - Build for HVX v71
=v73 - Build for HVX v73
--mips-compact-branches=<value> - MIPS Specific: Compact branch policy.
=never - Do not use compact branches if possible.
=optimal - Use compact branches where appropriate (default).
=always - Always use compact branches if possible.
--mips16-constant-islands - Enable mips16 constant islands.
--mips16-hard-float - Enable mips16 hard float.
--mir-strip-debugify-only - Should mir-strip-debug only strip debug info from debugified modules by default
--misexpect-tolerance=<uint> - Prevents emiting diagnostics when profile counts are within N% of the threshold..
--mno-compound - Disable looking for compound instructions for Hexagon
--mno-fixup - Disable fixing up resolved relocations for Hexagon
--mno-ldc1-sdc1 - Expand double precision loads and stores to their single precision counterparts
--mno-pairing - Disable looking for duplex instructions for Hexagon
--module-hash - Emit module hash
--module-summary - Emit module summary index
--mtriple=<string> - Override target triple for module
--mwarn-missing-parenthesis - Warn for missing parenthesis around predicate registers
--mwarn-noncontigious-register - Warn for register names that arent contigious
--mwarn-sign-mismatch - Warn for mismatching a signed and unsigned value
--mxcoff-roptr - When set to true, const objects with relocatable address values are put into the RO data section.
--no-deprecated-warn - Suppress all deprecated warnings
--no-discriminators - Disable generation of discriminator information.
--no-integrated-as - Disable integrated assembler
--no-type-check - Suppress type errors (Wasm)
--no-warn - Suppress all warnings
--nozero-initialized-in-bss - Don't place zero-initialized symbols into bss section
--nvptx-sched4reg - NVPTX Specific: schedule for register pressue
-o <filename> - Override output filename
--object-size-offset-visitor-max-visit-instructions=<uint> - Maximum number of instructions for ObjectSizeOffsetVisitor to look at
--pass-remarks-filter=<regex> - Only record optimization remarks from passes whose names match the given regular expression
--pass-remarks-format=<format> - The format used for serializing remarks (default: YAML)
--pass-remarks-output=<filename> - Output filename for pass remarks
--passes=<string> - A textual description of the pass pipeline. To have analysis passes available before a certain pass, add 'require<foo-analysis>'.
--pgo-block-coverage - Use this option to enable basic block coverage instrumentation
--pgo-temporal-instrumentation - Use this option to enable temporal instrumentation
--pgo-view-block-coverage-graph - Create a dot file of CFGs with block coverage inference information
--poison-checking-function-local - Check that returns are non-poison (for testing)
--print-passes - Print available passes that can be specified in -passes=foo and exit
--print-pipeline-passes - Print a '-passes' compatible string describing the pipeline (best-effort only).
--profile-correlate=<value> - Use debug info or binary file to correlate profiles.
=<empty> - No profile correlation
=debug-info - Use debug info to correlate
=binary - Use binary to correlate
--r600-ir-structurize - Use StructurizeCFG IR pass
--relax-elf-relocations - Emit GOTPCRELX/REX_GOTPCRELX instead of GOTPCREL on x86-64 ELF
--relocation-model=<value> - Choose relocation model
=static - Non-relocatable code
=pic - Fully relocatable, position independent code
=dynamic-no-pic - Relocatable external references, non-relocatable code
=ropi - Code and read-only data relocatable, accessed PC-relative
=rwpi - Read-write data relocatable, accessed relative to static base
=ropi-rwpi - Combination of ropi and rwpi
--riscv-add-build-attributes -
--riscv-use-aa - Enable the use of AA during codegen.
--runtime-counter-relocation - Enable relocating counters at runtime.
--safepoint-ir-verifier-print-only -
--sample-profile-check-record-coverage=<N> - Emit a warning if less than N% of records in the input profile are matched to the IR.
--sample-profile-check-sample-coverage=<N> - Emit a warning if less than N% of samples in the input profile are matched to the IR.
--sample-profile-max-propagate-iterations=<uint> - Maximum number of iterations to go through when propagating sample block/edge weights through the CFG.
--skip-ret-exit-block - Suppress counter promotion if exit blocks contain ret.
--speculative-counter-promotion-max-exiting=<uint> - The max number of exiting blocks of a loop to allow speculative counter promotion
--speculative-counter-promotion-to-loop - When the option is false, if the target block is in a loop, the promotion will be disallowed unless the promoted counter update can be further/iteratively promoted into an acyclic region.
--split-machine-functions - Split out cold basic blocks from machine functions based on profile information
--stack-size-section - Emit a section containing stack size metadata
--stack-symbol-ordering - Order local stack symbols.
--stackrealign - Force align the stack to the minimum alignment
--strict-dwarf - use strict dwarf
--strip-debug - Strip debugger symbol info from translation unit
--strip-named-metadata - Strip module-level named metadata
--summary-file=<string> - The summary file to use for function importing.
--sve-tail-folding=<string> - Control the use of vectorisation using tail-folding for SVE where the option is specified in the form (Initial)[+(Flag1|Flag2|...)]:
disabled (Initial) No loop types will vectorize using tail-folding
default (Initial) Uses the default tail-folding settings for the target CPU
all (Initial) All legal loop types will vectorize using tail-folding
simple (Initial) Use tail-folding for simple loops (not reductions or recurrences)
reductions Use tail-folding for loops containing reductions
noreductions Inverse of above
recurrences Use tail-folding for loops containing fixed order recurrences
norecurrences Inverse of above
reverse Use tail-folding for loops requiring reversed predicates
noreverse Inverse of above
--swift-async-fp=<value> - Determine when the Swift async frame pointer should be set
=auto - Determine based on deployment target
=always - Always set the bit
=never - Never set the bit
--tail-predication=<value> - MVE tail-predication pass options
=disabled - Don't tail-predicate loops
=enabled-no-reductions - Enable tail-predication, but not for reduction loops
=enabled - Enable tail-predication, including reduction loops
=force-enabled-no-reductions - Enable tail-predication, but not for reduction loops, and force this which might be unsafe
=force-enabled - Enable tail-predication, including reduction loops, and force this which might be unsafe
--tailcallopt - Turn fastcc calls into tail calls by (potentially) changing ABI.
--thin-link-bitcode-file=<filename> - A file in which to write minimized bitcode for the thin link only
--thinlto-assume-merged - Assume the input has already undergone ThinLTO function importing and the other pre-optimization pipeline changes.
--thinlto-bc - Write output as ThinLTO-ready bitcode
--thinlto-split-lto-unit - Enable splitting of a ThinLTO LTOUnit
--thread-model=<value> - Choose threading model
=posix - POSIX thread model
=single - Single thread model
--threads=<int> -
--time-trace - Record time trace
--time-trace-file=<filename> - Specify time trace file destination
--tls-size=<uint> - Bit size of immediate TLS offsets
--type-based-intrinsic-cost - Calculate intrinsics cost based only on argument types
--unique-basic-block-section-names - Give unique names to every basic block section
--unique-section-names - Give unique names to every section
--use-ctors - Use .ctors instead of .init_array.
--vec-extabi - Enable the AIX Extended Altivec ABI.
--verify-debuginfo-preserve - Start the pipeline with collecting and end it with checking of debug info preservation.
--verify-di-preserve-export=<filename> - Export debug info preservation failures into specified (JSON) file (should be abs path as we use append mode to insert new JSON objects)
--verify-each - Verify after each transform
--verify-each-debuginfo-preserve - Start each pass with collecting and end it with checking of debug info preservation.
--verify-region-info - Verify region info (time consuming)
--vp-counters-per-site=<number> - The average number of profile counters allocated per value profiling site.
--vp-static-alloc - Do static counter allocation for value profiler
--wasm-enable-eh - WebAssembly exception handling
--wasm-enable-sjlj - WebAssembly setjmp/longjmp handling
--x86-align-branch=<string> - Specify types of branches to align (plus separated list of types):
jcc indicates conditional jumps
fused indicates fused conditional jumps
jmp indicates direct unconditional jumps
call indicates direct and indirect calls
ret indicates rets
indirect indicates indirect unconditional jumps
--x86-align-branch-boundary=<uint> - Control how the assembler should align branches with NOP. If the boundary's size is not 0, it should be a power of 2 and no less than 32. Branches will be aligned to prevent from being across or against the boundary of specified size. The default value 0 does not align branches.
--x86-branches-within-32B-boundaries - Align selected instructions to mitigate negative performance impact of Intel's micro code update for errata skx102. May break assumptions about labels corresponding to particular instructions, and should be used with caution.
--x86-pad-max-prefix-size=<uint> - Maximum number of prefixes to use for padding
--xcoff-traceback-table - Emit the XCOFF traceback table
--xray-function-index - Emit xray_fn_idx section
Generic Options:
--help - Display available options (--help-hidden for more)
--help-list - Display list of available options (--help-list-hidden for more)
--version - Display the version of this program
Options (600)
| Option | Description | Source |
|---|---|---|
--color | - Use colors in output (default=autodetect) | help |
--O0 | - Optimization level 0. | help |
--O1 | - Optimization level 1. | help |
--O2 | - Optimization level 2. | help |
--O3 | - Optimization level 3. | help |
--Os | - Like -O2 but size-conscious. | help |
--Oz | - Like -O2 but optimize for code size above all else. | help |
-S | - Write output as LLVM assembly | help |
--aarch64-neon-syntax value | - Choose style of NEON code to emit from AArch64 backend: =generic - Emit generic NEON assembly =apple - Emit Apple-style NEON assembly | help |
--aarch64-use-aa | - Enable the use of AA during codegen. | help |
--abort-on-max-devirt-iterations-reached | - Abort when the max iterations for devirtualization CGSCC repeat pass is reached | help |
--addrsig | - Emit an address-significance table | help |
--align-loops uint | - Default alignment for loops | help |
--allow-ginsert-as-artifact | - Allow G_INSERT to be considered an artifact. | help |
--amdgpu-atomic-optimizer-strategy value | - Select DPP or Iterative strategy for scan =DPP - Use DPP operations for scan =Iterative - Use Iterative approach for scan =None - Disable atomic optimizer | help |
--amdgpu-bypass-slow-div | - Skip 64-bit divide for dynamic 32-bit values | help |
--amdgpu-disable-loop-alignment | - Do not align and prefetch loops | help |
--amdgpu-dpp-combine | - Enable DPP combiner | help |
--amdgpu-dump-hsa-metadata | - Dump AMDGPU HSA Metadata | help |
--amdgpu-enable-merge-m0 | - Merge and hoist M0 initializations | help |
--amdgpu-enable-power-sched | - Enable scheduling to minimize mAI power bursts | help |
--amdgpu-kernarg-preload-count uint | - How many kernel arguments to preload onto SGPRs | help |
--amdgpu-promote-alloca-to-vector-limit uint | - Maximum byte size to consider promote alloca to vector | help |
--amdgpu-sdwa-peephole | - Enable SDWA peepholer | help |
--amdgpu-use-aa-in-codegen | - Enable the use of AA during codegen. | help |
--amdgpu-verify-hsa-metadata | - Verify AMDGPU HSA Metadata | help |
--amdgpu-vgpr-index-mode | - Use GPR indexing mode instead of movrel for vector indexing | help |
--arm-add-build-attributes | - | help |
--arm-implicit-it value | - Allow conditional instructions outdside of an IT block =always - Accept in both ISAs, emit implicit ITs in Thumb =never - Warn in ARM, reject in Thumb =arm - Accept in ARM, reject in Thumb =thumb -… | help |
--asm-show-inst | - Emit internal instruction representation to assembly file | help |
--atomic-counter-update-promoted | - Do counter update using atomic fetch add for promoted counters only | help |
--atomic-first-counter | - Use atomic fetch add for first counter in a function (usually the entry counter) | help |
--bounds-checking-single-trap | - Use one trap block per function | help |
--bounds-checking-unique-traps | - Always use one trap per check | help |
--bpf-stack-size int | - Specify the BPF stack size limit | help |
--bugpoint-enable-legacy-pm | - Enable the legacy pass manager. | help |
--cfg-hide-cold-paths number | - Hide blocks with relative frequency below the given value | help |
--cfg-hide-deoptimize-paths | - | help |
--cfg-hide-unreachable-paths | - | help |
--code-model value | - Choose code model =tiny - Tiny code model =small - Small code model =kernel - Kernel code model =medium - Medium code model =large - Large code model | help |
--codegen-opt-level uint | - Override optimization level for codegen hooks, legacy PM only | help |
--cost-kind value | - Target cost kind =throughput - Reciprocal throughput =latency - Instruction latency =code-size - Code size =size-latency - Code size and latency | help |
--cs-profile-generate | - Perform context sensitive PGO instrumentation | help |
--cs-profile-path string | - Context sensitive profile file path | help |
--data-layout layout-string | - data layout string to use | help |
--data-sections | - Emit data into separate sections | help |
--debug-entry-values | - Enable debug info for the debug entry values. | help |
--debug-info-correlate | - Use debug info to correlate profiles. | help |
--debugger-tune value | - Tune debug info for a particular debugger =gdb - gdb =lldb - lldb =dbx - dbx =sce - SCE targets (e.g. PS4) | help |
--debugify-each | - Start each pass with debugify and end it with check-debugify | help |
--debugify-export filename | - Export per-pass debugify statistics to this file | help |
--debugify-func-limit ulong | - Set max number of processed functions per pass. | help |
--debugify-level value | - Kind of debug info to add =locations - Locations only =location+variables - Locations and Variables | help |
--debugify-quiet | - Suppress verbose debugify output | help |
--denormal-fp-math value | - Select which denormal numbers the code is permitted to require =ieee - IEEE 754 denormal numbers =preserve-sign - the sign of a flushed-to-zero number is preserved in the sign of 0 =positive-zero -… | help |
--denormal-fp-math-f32 value | - Select which denormal numbers the code is permitted to require for float =ieee - IEEE 754 denormal numbers =preserve-sign - the sign of a flushed-to-zero number is preserved in the sign of 0… | help |
--disable-auto-upgrade-debug-info | - Disable autoupgrade of debug info | help |
--disable-builtin string | - Disable specific target library builtin function | help |
--disable-debug-info-type-map | - Don't use a uniquing type map for debug info | help |
--disable-i2p-p2i-opt | - Disables inttoptr/ptrtoint roundtrip optimization | help |
--disable-loop-unrolling | - Disable loop unrolling in all relevant passes | help |
--disable-promote-alloca-to-lds | - Disable promote alloca to LDS | help |
--disable-promote-alloca-to-vector | - Disable promote alloca to vector | help |
--disable-simplify-libcalls | - Disable simplify-libcalls | help |
--disable-tail-calls | - Never emit tail calls | help |
--do-counter-promotion | - Do counter register promotion | help |
--dot-cfg-mssa file | - file name for generated dot file | help |
--dwarf-version int | - Dwarf version | help |
--dwarf64 | - Generate debugging info in the 64-bit DWARF format | help |
--emit-call-site-info | - Emit call site debug information, if debug information is enabled. | help |
--emit-compact-unwind-non-canonical | - Whether to try to emit Compact Unwind for non canonical entries. | help |
--emit-dwarf-unwind value | - Whether to emit DWARF EH frame entries. | help |
--emscripten-cxx-exceptions-allowed string | - The list of function names in which Emscripten-style exception handling is enabled (see emscripten EMSCRIPTEN_CATCHING_ALLOWED options) | help |
--emulated-tls | - Use emulated TLS model | help |
--enable-approx-func-fp-math | - Enable FP math optimizations that assume approx func | help |
--enable-cse-in-irtranslator | - Should enable CSE in irtranslator | help |
--enable-cse-in-legalizer | - Should enable CSE in Legalizer | help |
--enable-debugify | - Start the pipeline with debugify and end it with check-debugify | help |
--enable-emscripten-cxx-exceptions | - WebAssembly Emscripten-style exception handling | help |
--enable-emscripten-sjlj | - WebAssembly Emscripten-style setjmp/longjmp handling | help |
--enable-gvn-hoist | - Enable the GVN hoisting pass (default = off) | help |
--enable-gvn-memdep | - | help |
--enable-gvn-sink | - Enable the GVN sinking pass (default = off) | help |
--enable-jmc-instrument | - Instrument functions with a call to __CheckForDebuggerJustMyCode | help |
--enable-load-in-loop-pre | - | help |
--enable-load-pre | - | help |
--enable-loop-simplifycfg-term-folding | - | help |
--enable-name-compression | - Enable name/filename string compression | help |
--enable-no-infs-fp-math | - Enable FP math optimizations that assume no +-Infs | help |
--enable-no-nans-fp-math | - Enable FP math optimizations that assume no NaNs | help |
--enable-no-signed-zeros-fp-math | - Enable FP math optimizations that assume the sign of 0 is insignificant | help |
--enable-no-trapping-fp-math | - Enable setting the FP exceptions build attribute not to use exceptions | help |
--enable-split-backedge-in-load-pre | - | help |
--enable-split-loopiv-heuristic | - Enable loop iv regalloc heuristic | help |
--enable-tlsdesc | - Enable the use of TLS Descriptors | help |
--enable-unsafe-fp-math | - Enable optimizations that may decrease FP precision | help |
--exception-model value | - exception model =default - default exception handling model =dwarf - DWARF-like CFI based exception handling =sjlj - SjLj exception handling =arm - ARM EHABI exceptions =wineh - Windows exception… | help |
--experimental-debug-variable-locations | - Use experimental new value-tracking variable locations | help |
--experimental-debuginfo-iterators | - Enable communicating debuginfo positions through iterators, eliminating intrinsics | help |
-f | - Enable binary output on terminals | help |
--fatal-warnings | - Treat warnings as errors | help |
--filetype value | - Choose a file type (not all types are supported by all targets): =asm - Emit an assembly ('.s') file =obj - Emit a native object ('.o') file =null - Emit nothing, for performance testing | help |
--float-abi value | - Choose float ABI type =default - Target default float ABI type =soft - Soft float ABI (implied by -soft-float) =hard - Hard float ABI (uses FP registers) | help |
--force-dwarf-frame-section | - Always emit a debug frame section. | help |
--force-tail-folding-style value | - Force the tail folding style =none - Disable tail folding =data - Create lane mask for data only, using active.lane.mask intrinsic =data-without-lane-mask - Create lane mask with compare/stepvector… | help |
--fp-contract value | - Enable aggressive formation of fused FP ops =fast - Fuse FP ops whenever profitable =on - Only fuse 'blessed' FP ops. | help |
--frame-pointer value | - Specify frame pointer elimination optimization =all - Disable frame pointer elimination =non-leaf - Disable frame pointer elimination for non-leaf frame =none - Enable frame pointer elimination | help |
--fs-profile-debug-bw-threshold uint | - Only show debug message if the source branch weight is greater than this value. | help |
--fs-profile-debug-prob-diff-threshold uint | - Only show debug message if the branch probility is greater than this value (in percentage). | help |
--function-sections | - Emit functions into separate sections | help |
--generate-merged-base-profiles | - When generating nested context-sensitive profiles, always generate extra base profile for function with all its context profiles merged into it. | help |
--gpsize uint | - Global Pointer Addressing Size. | help |
--hash-based-counter-split | - Rename counter variable of a comdat function based on cfg hash | help |
--hexagon-rdf-limit uint | - | help |
--hot-cold-split | - Enable hot-cold splitting pass | help |
--ignore-xcoff-visibility | - Not emit the visibility attribute for asm in AIX OS or give all symbols 'unspecified' visibility in XCOFF object file | help |
--import-all-index | - Import all external functions in index. | help |
--incremental-linker-compatible | - When used with filetype=obj, emit an object file which can be used with an incremental linker | help |
--instcombine-code-sinking | - Enable code sinking | help |
--instcombine-guard-widening-window uint | - How wide an instruction window to bypass looking for another guard | help |
--instcombine-max-num-phis uint | - Maximum number phis to handle in intptr/ptrint folding | help |
--instcombine-max-sink-users uint | - Maximum number of undroppable users for instruction sinking | help |
--instcombine-maxarray-size uint | - Maximum array size considered when doing a combine | help |
--instcombine-negator-enabled | - Should we attempt to sink negations? | help |
--instcombine-negator-max-depth uint | - What is the maximal lookup depth when trying to check for viability of negation sinking. | help |
--instrprof-atomic-counter-update-all | - Make all profile counter updates atomic (for testing only) | help |
--internalize-public-api-file filename | - A file containing list of symbol names to preserve | help |
--internalize-public-api-list list | - A list of symbol names to preserve | help |
--iterative-counter-promotion | - Allow counter promotion across the whole loop nest. | help |
--large-data-threshold ulong | - Choose large data threshold for x86_64 medium code model | help |
--load pluginfilename | - Load the specified plugin | help |
--load-pass-plugin string | - Load passes from plugin library | help |
--aa | - Function Alias Analysis Results | help |
--aarch64-O0-prelegalizer-combiner | - Combine AArch64 machine instrs before legalization | help |
--aarch64-a57-fp-load-balancing | - AArch64 A57 FP Load-Balancing | help |
--aarch64-branch-targets | - AArch64 Branch Targets | help |
--aarch64-ccmp | - AArch64 CCMP Pass | help |
--aarch64-collect-loh | - AArch64 Collect Linker Optimization Hint (LOH) | help |
--aarch64-condopt | - AArch64 CondOpt Pass | help |
--aarch64-copyelim | - AArch64 redundant copy elimination pass | help |
--aarch64-dead-defs | - AArch64 Dead register definitions | help |
--aarch64-expand-pseudo | - AArch64 pseudo instruction expansion pass | help |
--aarch64-falkor-hwpf-fix | - Falkor HW Prefetch Fix | help |
--aarch64-falkor-hwpf-fix-late | - Falkor HW Prefetch Fix Late Phase | help |
--aarch64-fix-cortex-a53-835769-pass | - AArch64 fix for A53 erratum 835769 | help |
--aarch64-globals-tagging | - AArch64 Globals Tagging Pass | help |
--aarch64-isel | - AArch64 Instruction Selection | help |
--aarch64-jump-tables | - AArch64 compress jump tables pass | help |
--aarch64-ldst-opt | - AArch64 load / store optimization pass | help |
--aarch64-lit | - Transform specific loop idioms into optimized vector forms | help |
--aarch64-local-dynamic-tls-cleanup | - AArch64 Local Dynamic TLS Access Clean-up | help |
--aarch64-lower-homogeneous-prolog-epilog | - AArch64 homogeneous prolog/epilog lowering pass | help |
--aarch64-mi-peephole-opt | - AArch64 MI Peephole Optimization | help |
--aarch64-post-select-optimize | - Optimize AArch64 selected instructions | help |
--aarch64-postlegalizer-combiner | - Combine AArch64 MachineInstrs after legalization | help |
--aarch64-postlegalizer-lowering | - Lower AArch64 MachineInstrs after legalization | help |
--aarch64-prelegalizer-combiner | - Combine AArch64 machine instrs before legalization | help |
--aarch64-promote-const | - AArch64 Promote Constant Pass | help |
--aarch64-ptrauth | - AArch64 Pointer Authentication | help |
--aarch64-simd-scalar | - AdvSIMD Scalar Operation Optimization | help |
--aarch64-simdinstr-opt | - AArch64 SIMD instructions optimization pass | help |
--aarch64-sls-hardening | - AArch64 sls hardening pass | help |
--aarch64-sme-abi | - SME ABI Pass | help |
--aarch64-speculation-hardening | - AArch64 speculation hardening pass | help |
--aarch64-stack-tagging | - AArch64 Stack Tagging | help |
--aarch64-stack-tagging-pre-ra | - AArch64 Stack Tagging PreRA Pass | help |
--aarch64-stp-suppress | - AArch64 Store Pair Suppression | help |
--aarch64-sve-intrinsic-opts | - SVE intrinsics optimizations | help |
--alloca-hoisting | - Hoisting alloca instructions in non-entry blocks to the entry block | help |
--always-inline | - Inliner for always_inline functions | help |
--amdgpu-aa | - AMDGPU Address space based Alias Analysis | help |
--amdgpu-aa-wrapper | - AMDGPU Address space based Alias Analysis Wrapper | help |
--amdgpu-always-inline | - AMDGPU Inline All Functions | help |
--amdgpu-annotate-kernel-features | - Add AMDGPU function attributes | help |
--amdgpu-annotate-uniform | - Add AMDGPU uniform metadata | help |
--amdgpu-argument-reg-usage-info | - Argument Register Usage Information Storage | help |
--amdgpu-atomic-optimizer | - AMDGPU atomic optimizations | help |
--amdgpu-attributor | - AMDGPU Attributor | help |
--amdgpu-codegenprepare | - AMDGPU IR optimizations | help |
--amdgpu-global-isel-divergence-lowering | - AMDGPU GlobalISel divergence lowering | help |
--amdgpu-image-intrinsic-opt | - AMDGPU Image Intrinsic Optimizer | help |
--amdgpu-insert-delay-alu | - AMDGPU Insert Delay ALU | help |
--amdgpu-insert-single-use-vdst | - AMDGPU Insert SingleUseVDST | help |
--amdgpu-isel | - AMDGPU DAG->DAG Pattern Instruction Selection | help |
--amdgpu-late-codegenprepare | - AMDGPU IR late optimizations | help |
--amdgpu-lower-ctor-dtor | - Lower ctors and dtors for AMDGPU | help |
--amdgpu-lower-enqueued-block | - Lower OpenCL enqueued blocks | help |
--amdgpu-lower-kernel-arguments | - AMDGPU Lower Kernel Arguments | help |
--amdgpu-lower-kernel-attributes | - AMDGPU Kernel Attributes | help |
--amdgpu-lower-module-lds | - Lower uses of LDS variables from non-kernel functions | help |
--amdgpu-mark-last-scratch-load | - AMDGPU Mark last scratch load | help |
--amdgpu-nsa-reassign | - GCN NSA Reassign | help |
--amdgpu-perf-hint | - Analysis if a function is memory bound | help |
--amdgpu-postlegalizer-combiner | - Combine AMDGPU machine instrs after legalization | help |
--amdgpu-pre-ra-long-branch-reg | - AMDGPU Pre-RA Long Branch Reg | help |
--amdgpu-pre-ra-optimizations | - Pre-RA optimizations | help |
--amdgpu-prelegalizer-combiner | - Combine AMDGPU machine instrs before legalization | help |
--amdgpu-print-rp | - | help |
--amdgpu-printf-runtime-binding | - AMDGPU Printf lowering | help |
--amdgpu-promote-alloca | - AMDGPU promote alloca to vector or LDS | help |
--amdgpu-promote-alloca-to-vector | - AMDGPU promote alloca to vector | help |
--amdgpu-promote-kernel-arguments | - AMDGPU Promote Kernel Arguments | help |
--amdgpu-regbank-combiner | - Combine AMDGPU machine instrs after regbankselect | help |
--amdgpu-regbankselect | - AMDGPU Register Bank Select | help |
--amdgpu-remove-incompatible-functions | - AMDGPU Remove Incompatible Functions | help |
--amdgpu-resource-usage | - Function register usage analysis | help |
--amdgpu-rewrite-out-arguments | - AMDGPU Rewrite Out Arguments | help |
--amdgpu-rewrite-undef-for-phi | - Rewrite undef for PHI | help |
--amdgpu-unify-divergent-exit-nodes | - Unify divergent function exit nodes | help |
--amdgpu-unify-metadata | - Unify multiple OpenCL metadata due to linking | help |
--amode-opt | - Optimize addressing mode | help |
--arm-block-placement | - ARM block placement | help |
--arm-branch-targets | - ARM Branch Targets | help |
--arm-cp-islands | - ARM constant island placement and branch shortening pass | help |
--arm-execution-domain-fix | - ARM Execution Domain Fix | help |
--arm-fix-cortex-a57-aes-1742098 | - ARM fix for Cortex-A57 AES Erratum 1742098 | help |
--arm-isel | - ARM Instruction Selection | help |
--arm-ldst-opt | - ARM load / store optimization pass | help |
--arm-low-overhead-loops | - ARM Low Overhead Loops pass | help |
--arm-mve-gather-scatter-lowering | - MVE gather/scattering lowering pass | help |
--arm-mve-vpt | - ARM MVE VPT block pass | help |
--arm-mve-vpt-opts | - ARM MVE TailPred and VPT Optimisations pass | help |
--arm-parallel-dsp | - Transform functions to use DSP intrinsics | help |
--arm-prera-ldst-opt | - ARM pre- register allocation load / store optimization pass | help |
--arm-pseudo | - ARM pseudo instruction expansion pass | help |
--arm-sls-hardening | - ARM sls hardening pass | help |
--assumption-cache-tracker | - Assumption Cache Tracker | help |
--atomic-expand | - Expand Atomic instructions | help |
--avr-expand-pseudo | - AVR pseudo instruction expansion pass | help |
--avr-isel | - AVR DAG->DAG Instruction Selection | help |
--avr-shift-expand | - AVR Shift Expansion | help |
--barrier | - A No-Op Barrier Pass | help |
--basic-aa | - Basic Alias Analysis (stateless AA impl) | help |
--basiccg | - CallGraph Construction | help |
--bbsections-profile-reader | - Reads and parses a basic block sections profile. | help |
--block-freq | - Block Frequency Analysis | help |
--bpf-check-and-opt-ir | - BPF Check And Adjust IR | help |
--bpf-isel | - BPF DAG->DAG Pattern Instruction Selection | help |
--bpf-mi-zext-elim | - BPF MachineSSA Peephole Optimization For ZEXT Eliminate | help |
--branch-prob | - Branch Probability Analysis | help |
--break-crit-edges | - Break critical edges in CFG | help |
--callbrprepare | - Prepare callbr | help |
--canon-freeze | - Canonicalize Freeze Instructions in Loops | help |
--check-debugify | - Check debug info from -debugify | help |
--check-debugify-function | - Check debug info from -debugify-function | help |
--codegenprepare | - Optimize for code generation | help |
--consthoist | - Constant Hoisting | help |
--cseinfo | - Analysis containing CSE Info | help |
--cycles | - Cycle Info Analysis | help |
--da | - Dependence Analysis | help |
--dce | - Dead Code Elimination | help |
--deadargelim | - Dead Argument Elimination | help |
--deadarghaX0r | - Dead Argument Hacking (BUGPOINT USE ONLY; | help |
--debugify | - Attach debug info to everything | help |
--debugify-function | - Attach debug info to a function | help |
--domfrontier | - Dominance Frontier Construction | help |
--domtree | - Dominator Tree Construction | help |
--dot-callgraph | - Print call graph to 'dot' file | help |
--dot-dom | - Print dominance tree of function to 'dot' file | help |
--dot-dom-only | - Print dominance tree of function to 'dot' file (with no function bodies) | help |
--dot-postdom | - Print postdominance tree of function to 'dot' file | help |
--dot-postdom-only | - Print postdominance tree of function to 'dot' file (with no function bodies) | help |
--dot-regions | - Print regions of function to 'dot' file | help |
--dot-regions-only | - Print regions of function to 'dot' file (with no function bodies) | help |
--dwarf-eh-prepare | - Prepare DWARF exceptions | help |
--early-cse | - Early CSE | help |
--early-cse-memssa | - Early CSE w/ MemorySSA | help |
--edge-bundles | - Bundle Machine CFG Edges | help |
--expand-large-div-rem | - Expand large div/rem | help |
--expand-large-fp-convert | - Expand large fp convert | help |
--expand-memcmp | - Expand memcmp() to load/stores | help |
--expand-reductions | - Expand reduction intrinsics | help |
--expandvp | - Expand vector predication intrinsics | help |
--external-aa | - External Alias Analysis | help |
--fastpretileconfig | - Fast Tile Register Preconfigure | help |
--fasttileconfig | - Fast Tile Register Configure | help |
--fix-irreducible | - Convert irreducible control-flow into natural loops | help |
--flattencfg | - Flatten the CFG | help |
--gcn-create-vopd | - GCN Create VOPD Instructions | help |
--gcn-dpp-combine | - GCN DPP Combine | help |
--generic-to-nvvm | - Ensure that the global variables are in the global address space | help |
--gisel-known-bits | - Analysis for ComputingKnownBits | help |
--global-merge | - Merge global variables | help |
--globals-aa | - Globals Alias Analysis | help |
--gvn | - Global Value Numbering | help |
--hexagon-bit-simplify | - Hexagon bit simplification | help |
--hexagon-cext-opt | - Hexagon constant-extender optimization | help |
--hexagon-constp | - Hexagon Constant Propagation | help |
--hexagon-copy-combine | - Hexagon Copy-To-Combine Pass | help |
--hexagon-early-if | - Hexagon early if conversion | help |
--hexagon-gen-mux | - Hexagon generate mux instructions | help |
--hexagon-isel | - Hexagon DAG->DAG Pattern Instruction Selection | help |
--hexagon-loop-idiom | - Recognize Hexagon-specific loop idioms | help |
--hexagon-nvj | - Hexagon NewValueJump | help |
--hexagon-packetizer | - Hexagon Packetizer | help |
--hexagon-rdf-opt | - Hexagon RDF optimizations | help |
--hexagon-split-double | - Hexagon Split Double Registers | help |
--hexagon-vc | - Hexagon Vector Combine | help |
--hexagon-vextract | - Hexagon optimize vextract | help |
--hexagon-vlcr | - Hexagon-specific predictive commoning for HVX vectors | help |
--hwloops | - Hexagon Hardware Loops | help |
--indirectbr-expand | - Expand indirectbr instructions | help |
--infer-address-spaces | - Infer address spaces | help |
--instcombine | - Combine redundant instructions | help |
--instruction-select | - Select target instructions out of generic instructions | help |
--instsimplify | - Remove redundant instructions | help |
--interleaved-access | - Lower interleaved memory accesses to target specific intrinsics | help |
--interleaved-load-combine | - Combine interleaved loads into wide loads and shufflevector instructions | help |
--intervals | - Interval Partition Construction | help |
--ir-similarity-identifier | - ir-similarity-identifier | help |
--irtranslator | - IRTranslator LLVM IR -> MI | help |
--iv-users | - Induction Variable Users | help |
--jmc-instrumenter | - Instrument function entry with call to __CheckForDebuggerJustMyCode | help |
--kcfi | - Insert KCFI indirect call checks | help |
--lanai-isel | - Lanai DAG->DAG Pattern Instruction Selection | help |
--lazy-block-freq | - Lazy Block Frequency Analysis | help |
--lazy-branch-prob | - Lazy Branch Probability Analysis | help |
--lazy-value-info | - Lazy Value Information Analysis | help |
--lcssa | - Loop-Closed SSA Form Pass | help |
--lcssa-verification | - LCSSA Verifier | help |
--legalizer | - Legalize the Machine IR a function's Machine IR | help |
--licm | - Loop Invariant Code Motion | help |
--liveintervals | - Live Interval Analysis | help |
--liveregmatrix | - Live Register Matrix | help |
--livestacks | - Live Stack Slot Analysis | help |
--livevars | - Live Variable Analysis | help |
--load-store-vectorizer | - Vectorize load and store instructions | help |
--loadstore-opt | - Generic memory optimizations | help |
--localizer | - Move/duplicate certain instructions close to their use | help |
--loongarch-isel | - LoongArch DAG->DAG Pattern Instruction Selection | help |
--loongarch-prera-expand-pseudo | - LoongArch Pre-RA pseudo instruction expansion pass | help |
--loop-data-prefetch | - Loop Data Prefetch | help |
--loop-extract | - Extract loops into new functions | help |
--loop-extract-single | - Extract at most one loop into a new function | help |
--loop-reduce | - Loop Strength Reduction | help |
--loop-rotate | - Rotate Loops | help |
--loop-simplify | - Canonicalize natural loops | help |
--loop-unroll | - Unroll loops | help |
--loops | - Natural Loop Information | help |
--lower-amx-intrinsics | - Lower AMX intrinsics | help |
--lower-amx-type | - Lower AMX type for load/store | help |
--lower-constant-intrinsics | - Lower constant intrinsics | help |
--lower-global-dtors | - Lower @llvm.global_dtors via `__cxa_atexit` | help |
--loweratomic | - Lower atomic intrinsics to non-atomic form | help |
--lowerinvoke | - Lower invoke and unwind, for unwindless code generators | help |
--lowerswitch | - Lower SwitchInst's to branches | help |
--lowertilecopy | - Tile Copy Lowering | help |
--machine-block-freq | - Machine Block Frequency Analysis | help |
--machine-branch-prob | - Machine Branch Probability Analysis | help |
--machine-cycles | - Machine Cycle Info Analysis | help |
--machine-domfrontier | - Machine Dominance Frontier Construction | help |
--machine-loops | - Machine Natural Loop Construction | help |
--machine-trace-metrics | - Machine Trace Metrics | help |
--machinedomtree | - MachineDominator Tree Construction | help |
--machinepostdomtree | - MachinePostDominator Tree Construction | help |
--mem2reg | - Promote Memory to Register | help |
--memdep | - Memory Dependence Analysis | help |
--memoryssa | - Memory SSA | help |
--mergeicmps | - Merge contiguous icmps into a memcmp | help |
--micromips-reduce-size | - MicroMips instruction size reduce pass | help |
--mips-branch-expansion | - Expand out of range branch instructions and fix forbidden slot hazards | help |
--mips-delay-slot-filler | - Fill delay slot for MIPS | help |
--mips-isel | - MIPS DAG->DAG Pattern Instruction Selection | help |
--mips-postlegalizer-combiner | - Combine Mips machine instrs after legalization | help |
--mips-prelegalizer-combiner | - Combine Mips machine instrs before legalization | help |
--mips-vr4300-mulmul-fix | - Mips VR4300 mulmul bugfix | help |
--module-summary-analysis | - Module Summary Analysis | help |
--module-summary-info | - Module summary info | help |
--msp430-isel | - MSP430 DAG->DAG Pattern Instruction Selection | help |
--mve-laneinterleave | - MVE lane interleaving | help |
--mve-tail-predication | - Transform predicated vector loops to use MVE tail predication | help |
--nary-reassociate | - Nary reassociation | help |
--nvptx-aa | - NVPTX Address space based Alias Analysis | help |
--nvptx-aa-wrapper | - NVPTX Address space based Alias Analysis Wrapper | help |
--nvptx-assign-valid-global-names | - Assign valid PTX names to globals | help |
--nvptx-atomic-lower | - Lower atomics of local memory to simple load/stores | help |
--nvptx-isel | - NVPTX DAG->DAG Pattern Instruction Selection | help |
--nvptx-lower-aggr-copies | - Lower aggregate copies, and llvm.mem* intrinsics into loops | help |
--nvptx-lower-alloca | - Lower Alloca | help |
--nvptx-lower-args | - Lower arguments (NVPTX) | help |
--nvptx-lower-ctor-dtor | - Lower ctors and dtors for NVPTX | help |
--nvptx-lower-unreachable | - Lower Unreachable | help |
--nvptx-proxyreg-erasure | - NVPTX ProxyReg Erasure | help |
--nvvm-intr-range | - Add !range metadata to NVVM intrinsics. | help |
--nvvm-reflect | - Replace occurrences of __nvvm_reflect() calls with 0/1 | help |
--opt-remark-emitter | - Optimization Remark Emitter | help |
--packets | - R600 Packetizer | help |
--partially-inline-libcalls | - Partially inline calls to library functions | help |
--phi-values | - Phi Values Analysis | help |
--place-backedge-safepoints-impl | - Place Backedge Safepoints | help |
--postdomtree | - Post-Dominator Tree Construction | help |
--ppc-atomic-expand | - PowerPC Expand Atomic | help |
--ppc-bool-ret-to-int | - Convert i1 constants to i32/i64 if they are returned | help |
--ppc-branch-coalescing | - Branch Coalescing | help |
--ppc-branch-select | - PowerPC Branch Selector | help |
--ppc-ctrloops | - PowerPC CTR loops generation | help |
--ppc-early-ret | - PowerPC Early-Return Creation | help |
--ppc-expand-isel | - PowerPC Expand ISEL Generation | help |
--ppc-gen-scalar-mass | - Generate Scalar MASS entries | help |
--ppc-isel | - PowerPC DAG->DAG Pattern Instruction Selection | help |
--ppc-loop-instr-form-prep | - Prepare loop for ppc preferred instruction forms | help |
--ppc-lower-massv-entries | - Lower MASSV entries | help |
--ppc-merge-strings | - PPC Merge String Pool | help |
--ppc-mi-peepholes | - PowerPC MI Peephole Optimization | help |
--ppc-pre-emit-peephole | - PowerPC Pre-Emit Peephole | help |
--ppc-reduce-cr-ops | - PowerPC Reduce CR logical Operation | help |
--ppc-tls-dynamic-call | - PowerPC TLS Dynamic Call Fixup | help |
--ppc-toc-reg-deps | - PowerPC TOC Register Dependencies | help |
--ppc-vsx-copy | - PowerPC VSX Copy Legalization | help |
--ppc-vsx-fma-mutate | - PowerPC VSX FMA Mutation | help |
--ppc-vsx-swaps | - PowerPC VSX Swap Removal | help |
--pre-isel-intrinsic-lowering | - Pre-ISel Intrinsic Lowering | help |
--print-function | - Print function to stderr | help |
--print-module | - Print module to stderr | help |
--profile-summary-info | - Profile summary info | help |
--pseudo-probe-inserter | - Insert pseudo probe annotations for value profiling | help |
--r600-expand-special-instrs | - R600ExpandSpecialInstrs | help |
--r600cf | - R600 Control Flow Finalizer | help |
--r600mergeclause | - R600 Clause Merge | help |
--reaching-deps-analysis | - ReachingDefAnalysis | help |
--reassociate | - Reassociate expressions | help |
--regbankselect | - Assign register bank of generic virtual registers | help |
--regions | - Detect single entry single exit regions | help |
--replace-with-veclib | - Replace intrinsics with calls to vector library | help |
--rewrite-partial-reg-uses | - Rewrite Partial Register Uses | help |
--riscv-O0-prelegalizer-combiner | - Combine RISC-V machine instrs before legalization | help |
--riscv-codegenprepare | - RISC-V CodeGenPrepare | help |
--riscv-dead-defs | - RISC-V Dead register definitions | help |
--riscv-expand-pseudo | - RISC-V pseudo instruction expansion pass | help |
--riscv-expand-pseudolisimm32 | - RISC-V post-regalloc pseudo instruction expansion pass | help |
--riscv-fold-masks | - RISC-V Fold Masks | help |
--riscv-gather-scatter-lowering | - RISC-V gather/scatter lowering pass | help |
--riscv-init-undef | - RISC-V init undef pass | help |
--riscv-insert-read-write-csr | - RISC-V Insert Read/Write CSR Pass | help |
--riscv-insert-vsetvli | - RISC-V Insert VSETVLI pass | help |
--riscv-insert-write-vxrm | - RISC-V Insert Write VXRM Pass | help |
--riscv-isel | - RISC-V DAG->DAG Pattern Instruction Selection | help |
--riscv-make-compressible | - RISC-V Make Compressible | help |
--riscv-merge-base-offset | - RISC-V Merge Base Offset | help |
--riscv-move-merge | - RISC-V Zcmp move merging pass | help |
--riscv-opt-w-instrs | - RISC-V Optimize W Instructions | help |
--riscv-postlegalizer-combiner | - Combine RISC-V MachineInstrs after legalization | help |
--riscv-prelegalizer-combiner | - Combine RISC-V machine instrs before legalization | help |
--riscv-prera-expand-pseudo | - RISC-V Pre-RA pseudo instruction expansion pass | help |
--riscv-push-pop-opt | - RISC-V Zcmp Push/Pop optimization pass | help |
--safe-stack | - Safe Stack instrumentation pass | help |
--scalar-evolution | - Scalar Evolution Analysis | help |
--scalarize-masked-mem-intrin | - Scalarize unsupported masked memory intrinsics | help |
--scev-aa | - ScalarEvolution-based Alias Analysis | help |
--scoped-noalias-aa | - Scoped NoAlias Alias Analysis | help |
--select-optimize | - Optimize selects | help |
--separate-const-offset-from-gep | - Split GEPs to a variadic base and a constant offset for better CSE | help |
--si-annotate-control-flow | - Annotate SI Control Flow | help |
--si-fix-sgpr-copies | - SI Fix SGPR copies | help |
--si-fix-vgpr-copies | - SI Fix VGPR copies | help |
--si-fold-operands | - SI Fold Operands | help |
--si-form-memory-clauses | - SI Form memory clauses | help |
--si-i1-copies | - SI Lower i1 Copies | help |
--si-insert-hard-clauses | - SI Insert Hard Clauses | help |
--si-insert-waitcnts | - SI Insert Waitcnts | help |
--si-late-branch-lowering | - SI insert s_cbranch_execz instructions | help |
--si-load-store-opt | - SI Load Store Optimizer | help |
--si-lower-control-flow | - SI lower control flow | help |
--si-lower-sgpr-spills | - SI lower SGPR spill instructions | help |
--si-lower-wwm-copies | - SI Lower WWM Copies | help |
--si-memory-legalizer | - SI Memory Legalizer | help |
--si-mode-register | - Insert required mode register values | help |
--si-opt-vgpr-liverange | - SI Optimize VGPR LiveRange | help |
--si-optimize-exec-masking | - SI optimize exec mask operations | help |
--si-optimize-exec-masking-pre-ra | - SI optimize exec mask operations pre-RA | help |
--si-peephole-sdwa | - SI Peephole SDWA | help |
--si-post-ra-bundler | - SI post-RA bundler | help |
--si-pre-allocate-wwm-regs | - SI Pre-allocate WWM Registers | help |
--si-pre-emit-peephole | - SI peephole optimizations | help |
--si-shrink-instructions | - SI Shrink Instructions | help |
--si-wqm | - SI Whole Quad Mode | help |
--simplifycfg | - Simplify the CFG | help |
--sink | - Code sinking | help |
--sjlj-eh-prepare | - Prepare SjLj exceptions | help |
--slotindexes | - Slot index numbering | help |
--slsr | - Straight line strength reduction | help |
--sparc-isel | - SPARC DAG->DAG Pattern Instruction Selection | help |
--speculative-execution | - Speculatively execute instructions | help |
--sroa | - Scalar Replacement Of Aggregates | help |
--stack-protector | - Insert stack protectors | help |
--stack-safety | - Stack Safety Analysis | help |
--stack-safety-local | - Stack Safety Local Analysis | help |
--structurizecfg | - Structurize the CFG | help |
--systemz-elim-compare | - SystemZ Comparison Elimination | help |
--systemz-isel | - SystemZ DAG->DAG Pattern Instruction Selection | help |
--systemz-ld-cleanup | - SystemZ Local Dynamic TLS Access Clean-up | help |
--systemz-long-branch | - SystemZ Long Branch | help |
--systemz-post-rewrite | - SystemZ Post Rewrite pass | help |
--systemz-shorten-inst | - SystemZ Instruction Shortening | help |
--systemz-tdc | - SystemZ Test Data Class optimization | help |
--tailcallelim | - Tail Call Elimination | help |
--targetlibinfo | - Target Library Information | help |
--targetpassconfig | - Target Pass Configuration | help |
--tbaa | - Type-Based Alias Analysis | help |
--thumb2-reduce-size | - Thumb2 instruction size reduce pass | help |
--tileconfig | - Tile Register Configure | help |
--tilepreconfig | - Tile Register Pre-configure | help |
--tlshoist | - TLS Variable Hoist | help |
--tti | - Target Transform Information | help |
--uniformity | - Uniformity Analysis | help |
--unify-loop-exits | - Fixup each natural loop to have a single exit block | help |
--unreachable-mbb-elimination | - Remove unreachable machine basic blocks | help |
--unreachableblockelim | - Remove unreachable blocks from the CFG | help |
--ve-isel | - VE DAG->DAG Pattern Instruction Selection | help |
--vec-merger | - R600 Vector Reg Merger | help |
--verify | - Module Verifier | help |
--verify-safepoint-ir | - Safepoint IR Verifier | help |
--view-callgraph | - View call graph | help |
--view-dom | - View dominance tree of function | help |
--view-dom-only | - View dominance tree of function (with no function bodies) | help |
--view-postdom | - View postdominance tree of function | help |
--view-postdom-only | - View postdominance tree of function (with no function bodies) | help |
--view-regions | - View regions of function | help |
--view-regions-only | - View regions of function (with no function bodies) | help |
--virtregmap | - Virtual Register Map | help |
--wasm-add-missing-prototypes | - Add prototypes to prototypes-less functions | help |
--wasm-argument-move | - Move ARGUMENT instructions for WebAssembly | help |
--wasm-cfg-sort | - Reorders blocks in topological order | help |
--wasm-cfg-stackify | - Insert BLOCK/LOOP/TRY markers for WebAssembly scopes | help |
--wasm-debug-fixup | - Ensures debug_value's that have been stackified become stack relative | help |
--wasm-eh-prepare | - Prepare WebAssembly exceptions | help |
--wasm-exception-info | - WebAssembly Exception Information | help |
--wasm-explicit-locals | - Convert registers to WebAssembly locals | help |
--wasm-fix-br-table-defaults | - Removes range checks and sets br_table default targets | help |
--wasm-fix-function-bitcasts | - Fix mismatching bitcasts for WebAssembly | help |
--wasm-fix-irreducible-control-flow | - Removes irreducible control flow | help |
--wasm-isel | - WebAssembly Instruction Selection | help |
--wasm-late-eh-prepare | - WebAssembly Late Exception Preparation | help |
--wasm-lower-br_unless | - Lowers br_unless into inverted br_if | help |
--wasm-lower-em-ehsjlj | - WebAssembly Lower Emscripten Exceptions / Setjmp / Longjmp | help |
--wasm-lower-reftypes-intptr-conv | - WebAssembly Lower RefTypes Int-Ptr Conversions | help |
--wasm-mclower-prepass | - Collects information ahead of time for MC lowering | help |
--wasm-mem-intrinsic-results | - Optimize memory intrinsic result values for WebAssembly | help |
--wasm-nullify-dbg-value-lists | - WebAssembly Nullify DBG_VALUE_LISTs | help |
--wasm-optimize-live-intervals | - Optimize LiveIntervals for WebAssembly | help |
--wasm-optimize-returned | - Optimize calls with "returned" attributes for WebAssembly | help |
--wasm-peephole | - WebAssembly peephole optimizations | help |
--wasm-reg-coloring | - Minimize number of registers used | help |
--wasm-reg-numbering | - Assigns WebAssembly register numbers for virtual registers | help |
--wasm-reg-stackify | - Reorder instructions to use the WebAssembly value stack | help |
--wasm-replace-phys-regs | - Replace physical registers with virtual registers | help |
--wasm-set-p2align-operands | - Set the p2align operands for WebAssembly loads and stores | help |
--win-eh-prepare | - Prepare Windows exceptions | help |
--write-bitcode | - Write Bitcode | help |
--x86-avoid-SFB | - Machine code sinking | help |
--x86-avoid-trailing-call | - X86 avoid trailing call pass | help |
--x86-cf-opt | - X86 Call Frame Optimization | help |
--x86-cmov-conversion | - X86 cmov Conversion | help |
--x86-codegen | - X86 FP Stackifier | help |
--x86-compress-evex | - Compressing EVEX instrs when possible | help |
--x86-domain-reassignment | - X86 Domain Reassignment Pass | help |
--x86-execution-domain-fix | - X86 Execution Domain Fix | help |
--x86-fixup-LEAs | - X86 LEA Fixup | help |
--x86-fixup-bw-insts | - X86 Byte/Word Instruction Fixup | help |
--x86-fixup-setcc | - x86-fixup-setcc | help |
--x86-flags-copy-lowering | - X86 EFLAGS copy lowering | help |
--x86-isel | - X86 DAG->DAG Instruction Selection | help |
--x86-lvi-load | - X86 LVI load hardening | help |
--x86-lvi-ret | - X86 LVI ret hardener | help |
--x86-optimize-LEAs | - X86 optimize LEA pass | help |
--x86-partial-reduction | - X86 Partial Reduction | help |
--x86-pseudo | - X86 pseudo instruction expansion pass | help |
--x86-return-thunks | - X86 Return Thunks | help |
--x86-seses | - X86 Speculative Execution Side Effect Suppression | help |
--x86-slh | - X86 speculative load hardener | help |
--x86-winehstate | - Insert stores for EH state numbers | help |
--x86argumentstackrebase | - Argument Stack Rebase | help |
--xcore-isel | - XCore DAG->DAG Pattern Instruction Selection | help |
--lto-aix-system-assembler path | - Path to a system assembler, picked up on AIX only | help |
--lto-embed-bitcode value | - Embed LLVM bitcode in object files produced by LTO =none - Do not embed =optimized - Embed after all optimization passes =post-merge-pre-opt - Embed post merge, but before optimizations | help |
--lto-pass-remarks-filter regex | - Only record optimization remarks from passes whose names match the given regular expression | help |
--lto-pass-remarks-format format | - The format used for serializing remarks (default: YAML) | help |
--lto-pass-remarks-output filename | - Output filename for pass remarks | help |
--march string | - Architecture to generate code for (see --version) | help |
--matrix-default-layout value | - Sets the default matrix layout =column-major - Use column-major layout =row-major - Use row-major layout | help |
--matrix-print-after-transpose-opt | - | help |
--mattr, -a3 a1 | - Target specific attributes (-mattr=help for details) | help |
--max-counter-promotions int | - Max number of allowed counter promotions | help |
--max-counter-promotions-per-loop uint | - Max number counter promotions per loop to avoid increasing register pressure too much | help |
--mc-relax-all | - When used with filetype=obj, relax all fixups in the emitted object file | help |
--mcabac | - tbd | help |
--mcpu cpu-name | - Target a specific cpu type (-mcpu=help for details) | help |
--meabi value | - Set EABI type (default depends on triple): =default - Triple default EABI version =4 - EABI version 4 =5 - EABI version 5 =gnu - EABI GNU | help |
--merror-missing-parenthesis | - Error for missing parenthesis around predicate registers | help |
--merror-noncontigious-register | - Error for register names that aren't contigious | help |
--mhvx | - Enable Hexagon Vector eXtensions | help |
--mips-compact-branches value | - MIPS Specific: Compact branch policy. | help |
--mips16-constant-islands | - Enable mips16 constant islands. | help |
--mips16-hard-float | - Enable mips16 hard float. | help |
--mir-strip-debugify-only | - Should mir-strip-debug only strip debug info from debugified modules by default | help |
--misexpect-tolerance uint | - Prevents emiting diagnostics when profile counts are within N% of the threshold.. | help |
--mno-compound | - Disable looking for compound instructions for Hexagon | help |
--mno-fixup | - Disable fixing up resolved relocations for Hexagon | help |
--mno-ldc1-sdc1 | - Expand double precision loads and stores to their single precision counterparts | help |
--mno-pairing | - Disable looking for duplex instructions for Hexagon | help |