.TH "libnvme" 9 "enum nvme_feat" "October 2026" "API Manual" LINUX
.SH NAME
enum nvme_feat \- Features Access Shifts/Masks values
.SH SYNOPSIS
enum nvme_feat {
.br
.BI "    NVME_FEAT_ARBITRATION_BURST_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_ARBITRATION_BURST_MASK"
, 
.br
.br
.BI "    NVME_FEAT_ARBITRATION_LPW_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_ARBITRATION_LPW_MASK"
, 
.br
.br
.BI "    NVME_FEAT_ARBITRATION_MPW_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_ARBITRATION_MPW_MASK"
, 
.br
.br
.BI "    NVME_FEAT_ARBITRATION_HPW_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_ARBITRATION_HPW_MASK"
, 
.br
.br
.BI "    NVME_FEAT_PWRMGMT_PS_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_PWRMGMT_PS_MASK"
, 
.br
.br
.BI "    NVME_FEAT_PWRMGMT_WH_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_PWRMGMT_WH_MASK"
, 
.br
.br
.BI "    NVME_FEAT_PWRMGMT_IIELL_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_PWRMGMT_IIELL_MASK"
, 
.br
.br
.BI "    NVME_FEAT_LBAR_NR_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_LBAR_NR_MASK"
, 
.br
.br
.BI "    NVME_FEAT_TT_TMPTH_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_TT_TMPTH_MASK"
, 
.br
.br
.BI "    NVME_FEAT_TT_TMPSEL_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_TT_TMPSEL_MASK"
, 
.br
.br
.BI "    NVME_FEAT_TT_THSEL_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_TT_THSEL_MASK"
, 
.br
.br
.BI "    NVME_FEAT_TT_TMPTHH_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_TT_TMPTHH_MASK"
, 
.br
.br
.BI "    NVME_FEAT_ERROR_RECOVERY_TLER_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_ERROR_RECOVERY_TLER_MASK"
, 
.br
.br
.BI "    NVME_FEAT_ERROR_RECOVERY_DULBE_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_ERROR_RECOVERY_DULBE_MASK"
, 
.br
.br
.BI "    NVME_FEAT_VWC_WCE_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_VWC_WCE_MASK"
, 
.br
.br
.BI "    NVME_FEAT_NRQS_NSQR_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_NRQS_NSQR_MASK"
, 
.br
.br
.BI "    NVME_FEAT_NRQS_NCQR_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_NRQS_NCQR_MASK"
, 
.br
.br
.BI "    NVME_FEAT_IRQC_THR_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_IRQC_THR_MASK"
, 
.br
.br
.BI "    NVME_FEAT_IRQC_TIME_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_IRQC_TIME_MASK"
, 
.br
.br
.BI "    NVME_FEAT_ICFG_IV_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_ICFG_IV_MASK"
, 
.br
.br
.BI "    NVME_FEAT_ICFG_CD_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_ICFG_CD_MASK"
, 
.br
.br
.BI "    NVME_FEAT_WA_DN_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_WA_DN_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_SMART_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_SMART_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_NAN_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_NAN_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_FW_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_FW_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_TELEM_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_TELEM_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_ANA_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_ANA_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_PLA_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_PLA_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_LBAS_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_LBAS_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_EGA_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_EGA_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_NNSSHDN_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_NNSSHDN_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_TTHRY_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_TTHRY_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_RASSN_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_RASSN_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_RGRP0_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_RGRP0_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_ANSAN_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_ANSAN_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_CCRCN_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_CCRCN_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_LHCN_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_LHCN_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_RLCCN_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_RLCCN_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_ZDCN_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_ZDCN_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_PMDRLPCN_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_PMDRLPCN_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_ADLPCN_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_ADLPCN_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_HDLPCN_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_HDLPCN_MASK"
, 
.br
.br
.BI "    NVME_FEAT_AE_DLPCN_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_AE_DLPCN_MASK"
, 
.br
.br
.BI "    NVME_FEAT_APST_APSTE_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_APST_APSTE_MASK"
, 
.br
.br
.BI "    NVME_FEAT_HMEM_EHM_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_HMEM_EHM_MASK"
, 
.br
.br
.BI "    NVME_FEAT_KATO_TIMEOUT_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_KATO_TIMEOUT_MASK"
, 
.br
.br
.BI "    NVME_FEAT_HCTM_TMT2_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_HCTM_TMT2_MASK"
, 
.br
.br
.BI "    NVME_FEAT_HCTM_TMT1_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_HCTM_TMT1_MASK"
, 
.br
.br
.BI "    NVME_FEAT_NOPS_NOPPME_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_NOPS_NOPPME_MASK"
, 
.br
.br
.BI "    NVME_FEAT_RRL_NVMSETID_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_RRL_NVMSETID_MASK"
, 
.br
.br
.BI "    NVME_FEAT_RRL_RRL_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_RRL_RRL_MASK"
, 
.br
.br
.BI "    NVME_FEAT_PLM_NVMSETID_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_PLM_NVMSETID_MASK"
, 
.br
.br
.BI "    NVME_FEAT_PLM_LPE_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_PLM_LPE_MASK"
, 
.br
.br
.BI "    NVME_FEAT_PLMW_WS_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_PLMW_WS_MASK"
, 
.br
.br
.BI "    NVME_FEAT_LBAS_LSIRI_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_LBAS_LSIRI_MASK"
, 
.br
.br
.BI "    NVME_FEAT_LBAS_LSIPI_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_LBAS_LSIPI_MASK"
, 
.br
.br
.BI "    NVME_FEAT_SC_NODRM_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_SC_NODRM_MASK"
, 
.br
.br
.BI "    NVME_FEAT_EG_ENDGID_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_EG_ENDGID_MASK"
, 
.br
.br
.BI "    NVME_FEAT_EG_EGCW_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_EG_EGCW_MASK"
, 
.br
.br
.BI "    NVME_FEAT_FDPE_PHNDL_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_FDPE_PHNDL_MASK"
, 
.br
.br
.BI "    NVME_FEAT_FDPE_NOET_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_FDPE_NOET_MASK"
, 
.br
.br
.BI "    NVME_FEAT_SPM_PBSLC_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_SPM_PBSLC_MASK"
, 
.br
.br
.BI "    NVME_FEAT_HOSTID_EXHID_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_HOSTID_EXHID_MASK"
, 
.br
.br
.BI "    NVME_FEAT_RM_REGPRE_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_RM_REGPRE_MASK"
, 
.br
.br
.BI "    NVME_FEAT_RM_RESREL_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_RM_RESREL_MASK"
, 
.br
.br
.BI "    NVME_FEAT_RM_RESPRE_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_RM_RESPRE_MASK"
, 
.br
.br
.BI "    NVME_FEAT_RP_PTPL_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_RP_PTPL_MASK"
, 
.br
.br
.BI "    NVME_FEAT_WP_WPS_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_WP_WPS_MASK"
, 
.br
.br
.BI "    NVME_FEAT_IOCSP_IOCSCI_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_IOCSP_IOCSCI_MASK"
, 
.br
.br
.BI "    NVME_FEAT_SPINUP_CONTROL_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_SPINUP_CONTROL_MASK"
, 
.br
.br
.BI "    NVME_FEAT_PLS_MODE_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_PLS_MODE_MASK"
, 
.br
.br
.BI "    NVME_FEAT_PERFC_ATTRI_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_PERFC_ATTRI_MASK"
, 
.br
.br
.BI "    NVME_FEAT_PERFC_RVSPA_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_PERFC_RVSPA_MASK"
, 
.br
.br
.BI "    NVME_FEAT_PERFC_ATTRTYP_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_PERFC_ATTRTYP_MASK"
, 
.br
.br
.BI "    NVME_FEAT_FDP_ENABLED_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_FDP_ENABLED_MASK"
, 
.br
.br
.BI "    NVME_FEAT_FDP_INDEX_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_FDP_INDEX_MASK"
, 
.br
.br
.BI "    NVME_FEAT_FDP_EVENTS_ENABLE_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_FDP_EVENTS_ENABLE_MASK"
, 
.br
.br
.BI "    NVME_FEAT_HOST_ID_EXHID_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_HOST_ID_EXHID_MASK"
, 
.br
.br
.BI "    NVME_FEAT_BPWPC_BP0WPS_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_BPWPC_BP0WPS_MASK"
, 
.br
.br
.BI "    NVME_FEAT_BPWPC_BP1WPS_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_BPWPC_BP1WPS_MASK"
, 
.br
.br
.BI "    NVME_FEAT_SANITIZE_NODRM_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_SANITIZE_NODRM_MASK"
, 
.br
.br
.BI "    NVME_FEAT_RESP_PTPL_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_RESP_PTPL_MASK"
, 
.br
.br
.BI "    NVME_FEAT_CDP_CHPS"
, 
.br
.br
.BI "    NVME_FEAT_CDP_PERFS"
, 
.br
.br
.BI "    NVME_FEAT_CDP_PERID_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_CDP_PERID_MASK"
, 
.br
.br
.BI "    NVME_FEAT_CDP_PMDSS"
, 
.br
.br
.BI "    NVME_FEAT_CDP_PPSC"
, 
.br
.br
.BI "    NVME_FEAT_POWER_LIMIT_PLV_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_POWER_LIMIT_PLV_MASK"
, 
.br
.br
.BI "    NVME_FEAT_POWER_LIMIT_PLS_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_POWER_LIMIT_PLS_MASK"
, 
.br
.br
.BI "    NVME_FEAT_POWER_THRESH_PTV_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_POWER_THRESH_PTV_MASK"
, 
.br
.br
.BI "    NVME_FEAT_POWER_THRESH_PTS_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_POWER_THRESH_PTS_MASK"
, 
.br
.br
.BI "    NVME_FEAT_POWER_THRESH_PMTS_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_POWER_THRESH_PMTS_MASK"
, 
.br
.br
.BI "    NVME_FEAT_POWER_THRESH_EPT_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_POWER_THRESH_EPT_MASK"
, 
.br
.br
.BI "    NVME_FEAT_POWER_MEAS_ACT_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_POWER_MEAS_ACT_MASK"
, 
.br
.br
.BI "    NVME_FEAT_POWER_MEAS_PMTS_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_POWER_MEAS_PMTS_MASK"
, 
.br
.br
.BI "    NVME_FEAT_POWER_MEAS_SMT_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_POWER_MEAS_SMT_MASK"
, 
.br
.br
.BI "    NVME_FEAT_VOLTAGE_THRESHOLD_UVT_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_VOLTAGE_THRESHOLD_UVT_MASK"
, 
.br
.br
.BI "    NVME_FEAT_VOLTAGE_THRESHOLD_OVT_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_VOLTAGE_THRESHOLD_OVT_MASK"
, 
.br
.br
.BI "    NVME_FEAT_VOLTAGE_THRESHOLD_EVT"
, 
.br
.br
.BI "    NVME_FEAT_VOLTAGE_THRESHOLD_VSENS_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_VOLTAGE_THRESHOLD_VSENS_MASK"
, 
.br
.br
.BI "    NVME_FEAT_VOLTAGE_MEASUREMENT_ACT_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_VOLTAGE_MEASUREMENT_ACT_MASK"
, 
.br
.br
.BI "    NVME_FEAT_RATE_LIMITING_TID_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_RATE_LIMITING_TID_MASK"
, 
.br
.br
.BI "    NVME_FEAT_RATE_LIMITING_TGT_SHIFT"
, 
.br
.br
.BI "    NVME_FEAT_RATE_LIMITING_TGT_MASK"

};
.SH Constants
.IP "NVME_FEAT_ARBITRATION_BURST_SHIFT" 12
.IP "NVME_FEAT_ARBITRATION_BURST_MASK" 12
.IP "NVME_FEAT_ARBITRATION_LPW_SHIFT" 12
.IP "NVME_FEAT_ARBITRATION_LPW_MASK" 12
.IP "NVME_FEAT_ARBITRATION_MPW_SHIFT" 12
.IP "NVME_FEAT_ARBITRATION_MPW_MASK" 12
.IP "NVME_FEAT_ARBITRATION_HPW_SHIFT" 12
.IP "NVME_FEAT_ARBITRATION_HPW_MASK" 12
.IP "NVME_FEAT_PWRMGMT_PS_SHIFT" 12
.IP "NVME_FEAT_PWRMGMT_PS_MASK" 12
.IP "NVME_FEAT_PWRMGMT_WH_SHIFT" 12
.IP "NVME_FEAT_PWRMGMT_WH_MASK" 12
.IP "NVME_FEAT_PWRMGMT_IIELL_SHIFT" 12
Shift amount to set/get the Idle I/O Exit
Latency Limit (IIELL), in units of 100
microseconds
.IP "NVME_FEAT_PWRMGMT_IIELL_MASK" 12
Mask to set/get IIELL
.IP "NVME_FEAT_LBAR_NR_SHIFT" 12
.IP "NVME_FEAT_LBAR_NR_MASK" 12
.IP "NVME_FEAT_TT_TMPTH_SHIFT" 12
.IP "NVME_FEAT_TT_TMPTH_MASK" 12
.IP "NVME_FEAT_TT_TMPSEL_SHIFT" 12
.IP "NVME_FEAT_TT_TMPSEL_MASK" 12
.IP "NVME_FEAT_TT_THSEL_SHIFT" 12
.IP "NVME_FEAT_TT_THSEL_MASK" 12
.IP "NVME_FEAT_TT_TMPTHH_SHIFT" 12
.IP "NVME_FEAT_TT_TMPTHH_MASK" 12
.IP "NVME_FEAT_ERROR_RECOVERY_TLER_SHIFT" 12
.IP "NVME_FEAT_ERROR_RECOVERY_TLER_MASK" 12
.IP "NVME_FEAT_ERROR_RECOVERY_DULBE_SHIFT" 12
.IP "NVME_FEAT_ERROR_RECOVERY_DULBE_MASK" 12
.IP "NVME_FEAT_VWC_WCE_SHIFT" 12
.IP "NVME_FEAT_VWC_WCE_MASK" 12
.IP "NVME_FEAT_NRQS_NSQR_SHIFT" 12
.IP "NVME_FEAT_NRQS_NSQR_MASK" 12
.IP "NVME_FEAT_NRQS_NCQR_SHIFT" 12
.IP "NVME_FEAT_NRQS_NCQR_MASK" 12
.IP "NVME_FEAT_IRQC_THR_SHIFT" 12
.IP "NVME_FEAT_IRQC_THR_MASK" 12
.IP "NVME_FEAT_IRQC_TIME_SHIFT" 12
.IP "NVME_FEAT_IRQC_TIME_MASK" 12
.IP "NVME_FEAT_ICFG_IV_SHIFT" 12
.IP "NVME_FEAT_ICFG_IV_MASK" 12
.IP "NVME_FEAT_ICFG_CD_SHIFT" 12
.IP "NVME_FEAT_ICFG_CD_MASK" 12
.IP "NVME_FEAT_WA_DN_SHIFT" 12
.IP "NVME_FEAT_WA_DN_MASK" 12
.IP "NVME_FEAT_AE_SMART_SHIFT" 12
.IP "NVME_FEAT_AE_SMART_MASK" 12
.IP "NVME_FEAT_AE_NAN_SHIFT" 12
.IP "NVME_FEAT_AE_NAN_MASK" 12
.IP "NVME_FEAT_AE_FW_SHIFT" 12
.IP "NVME_FEAT_AE_FW_MASK" 12
.IP "NVME_FEAT_AE_TELEM_SHIFT" 12
.IP "NVME_FEAT_AE_TELEM_MASK" 12
.IP "NVME_FEAT_AE_ANA_SHIFT" 12
.IP "NVME_FEAT_AE_ANA_MASK" 12
.IP "NVME_FEAT_AE_PLA_SHIFT" 12
.IP "NVME_FEAT_AE_PLA_MASK" 12
.IP "NVME_FEAT_AE_LBAS_SHIFT" 12
.IP "NVME_FEAT_AE_LBAS_MASK" 12
.IP "NVME_FEAT_AE_EGA_SHIFT" 12
.IP "NVME_FEAT_AE_EGA_MASK" 12
.IP "NVME_FEAT_AE_NNSSHDN_SHIFT" 12
.IP "NVME_FEAT_AE_NNSSHDN_MASK" 12
.IP "NVME_FEAT_AE_TTHRY_SHIFT" 12
.IP "NVME_FEAT_AE_TTHRY_MASK" 12
.IP "NVME_FEAT_AE_RASSN_SHIFT" 12
.IP "NVME_FEAT_AE_RASSN_MASK" 12
.IP "NVME_FEAT_AE_RGRP0_SHIFT" 12
.IP "NVME_FEAT_AE_RGRP0_MASK" 12
.IP "NVME_FEAT_AE_ANSAN_SHIFT" 12
.IP "NVME_FEAT_AE_ANSAN_MASK" 12
.IP "NVME_FEAT_AE_CCRCN_SHIFT" 12
.IP "NVME_FEAT_AE_CCRCN_MASK" 12
.IP "NVME_FEAT_AE_LHCN_SHIFT" 12
.IP "NVME_FEAT_AE_LHCN_MASK" 12
.IP "NVME_FEAT_AE_RLCCN_SHIFT" 12
Shift amount to get/set the Rate Limiting
Configuration Change Notices (RLCCN)
.IP "NVME_FEAT_AE_RLCCN_MASK" 12
Mask to get/set RLCCN
.IP "NVME_FEAT_AE_ZDCN_SHIFT" 12
.IP "NVME_FEAT_AE_ZDCN_MASK" 12
.IP "NVME_FEAT_AE_PMDRLPCN_SHIFT" 12
.IP "NVME_FEAT_AE_PMDRLPCN_MASK" 12
.IP "NVME_FEAT_AE_ADLPCN_SHIFT" 12
.IP "NVME_FEAT_AE_ADLPCN_MASK" 12
.IP "NVME_FEAT_AE_HDLPCN_SHIFT" 12
.IP "NVME_FEAT_AE_HDLPCN_MASK" 12
.IP "NVME_FEAT_AE_DLPCN_SHIFT" 12
.IP "NVME_FEAT_AE_DLPCN_MASK" 12
.IP "NVME_FEAT_APST_APSTE_SHIFT" 12
.IP "NVME_FEAT_APST_APSTE_MASK" 12
.IP "NVME_FEAT_HMEM_EHM_SHIFT" 12
.IP "NVME_FEAT_HMEM_EHM_MASK" 12
.IP "NVME_FEAT_KATO_TIMEOUT_SHIFT" 12
.IP "NVME_FEAT_KATO_TIMEOUT_MASK" 12
.IP "NVME_FEAT_HCTM_TMT2_SHIFT" 12
.IP "NVME_FEAT_HCTM_TMT2_MASK" 12
.IP "NVME_FEAT_HCTM_TMT1_SHIFT" 12
.IP "NVME_FEAT_HCTM_TMT1_MASK" 12
.IP "NVME_FEAT_NOPS_NOPPME_SHIFT" 12
.IP "NVME_FEAT_NOPS_NOPPME_MASK" 12
.IP "NVME_FEAT_RRL_NVMSETID_SHIFT" 12
.IP "NVME_FEAT_RRL_NVMSETID_MASK" 12
.IP "NVME_FEAT_RRL_RRL_SHIFT" 12
.IP "NVME_FEAT_RRL_RRL_MASK" 12
.IP "NVME_FEAT_PLM_NVMSETID_SHIFT" 12
.IP "NVME_FEAT_PLM_NVMSETID_MASK" 12
.IP "NVME_FEAT_PLM_LPE_SHIFT" 12
.IP "NVME_FEAT_PLM_LPE_MASK" 12
.IP "NVME_FEAT_PLMW_WS_SHIFT" 12
.IP "NVME_FEAT_PLMW_WS_MASK" 12
.IP "NVME_FEAT_LBAS_LSIRI_SHIFT" 12
.IP "NVME_FEAT_LBAS_LSIRI_MASK" 12
.IP "NVME_FEAT_LBAS_LSIPI_SHIFT" 12
.IP "NVME_FEAT_LBAS_LSIPI_MASK" 12
.IP "NVME_FEAT_SC_NODRM_SHIFT" 12
.IP "NVME_FEAT_SC_NODRM_MASK" 12
.IP "NVME_FEAT_EG_ENDGID_SHIFT" 12
.IP "NVME_FEAT_EG_ENDGID_MASK" 12
.IP "NVME_FEAT_EG_EGCW_SHIFT" 12
.IP "NVME_FEAT_EG_EGCW_MASK" 12
.IP "NVME_FEAT_FDPE_PHNDL_SHIFT" 12
.IP "NVME_FEAT_FDPE_PHNDL_MASK" 12
.IP "NVME_FEAT_FDPE_NOET_SHIFT" 12
.IP "NVME_FEAT_FDPE_NOET_MASK" 12
.IP "NVME_FEAT_SPM_PBSLC_SHIFT" 12
.IP "NVME_FEAT_SPM_PBSLC_MASK" 12
.IP "NVME_FEAT_HOSTID_EXHID_SHIFT" 12
.IP "NVME_FEAT_HOSTID_EXHID_MASK" 12
.IP "NVME_FEAT_RM_REGPRE_SHIFT" 12
.IP "NVME_FEAT_RM_REGPRE_MASK" 12
.IP "NVME_FEAT_RM_RESREL_SHIFT" 12
.IP "NVME_FEAT_RM_RESREL_MASK" 12
.IP "NVME_FEAT_RM_RESPRE_SHIFT" 12
.IP "NVME_FEAT_RM_RESPRE_MASK" 12
.IP "NVME_FEAT_RP_PTPL_SHIFT" 12
.IP "NVME_FEAT_RP_PTPL_MASK" 12
.IP "NVME_FEAT_WP_WPS_SHIFT" 12
.IP "NVME_FEAT_WP_WPS_MASK" 12
.IP "NVME_FEAT_IOCSP_IOCSCI_SHIFT" 12
.IP "NVME_FEAT_IOCSP_IOCSCI_MASK" 12
.IP "NVME_FEAT_SPINUP_CONTROL_SHIFT" 12
.IP "NVME_FEAT_SPINUP_CONTROL_MASK" 12
.IP "NVME_FEAT_PLS_MODE_SHIFT" 12
.IP "NVME_FEAT_PLS_MODE_MASK" 12
.IP "NVME_FEAT_PERFC_ATTRI_SHIFT" 12
.IP "NVME_FEAT_PERFC_ATTRI_MASK" 12
.IP "NVME_FEAT_PERFC_RVSPA_SHIFT" 12
.IP "NVME_FEAT_PERFC_RVSPA_MASK" 12
.IP "NVME_FEAT_PERFC_ATTRTYP_SHIFT" 12
.IP "NVME_FEAT_PERFC_ATTRTYP_MASK" 12
.IP "NVME_FEAT_FDP_ENABLED_SHIFT" 12
.IP "NVME_FEAT_FDP_ENABLED_MASK" 12
.IP "NVME_FEAT_FDP_INDEX_SHIFT" 12
.IP "NVME_FEAT_FDP_INDEX_MASK" 12
.IP "NVME_FEAT_FDP_EVENTS_ENABLE_SHIFT" 12
.IP "NVME_FEAT_FDP_EVENTS_ENABLE_MASK" 12
.IP "NVME_FEAT_HOST_ID_EXHID_SHIFT" 12
.IP "NVME_FEAT_HOST_ID_EXHID_MASK" 12
.IP "NVME_FEAT_BPWPC_BP0WPS_SHIFT" 12
.IP "NVME_FEAT_BPWPC_BP0WPS_MASK" 12
.IP "NVME_FEAT_BPWPC_BP1WPS_SHIFT" 12
.IP "NVME_FEAT_BPWPC_BP1WPS_MASK" 12
.IP "NVME_FEAT_SANITIZE_NODRM_SHIFT" 12
.IP "NVME_FEAT_SANITIZE_NODRM_MASK" 12
.IP "NVME_FEAT_RESP_PTPL_SHIFT" 12
.IP "NVME_FEAT_RESP_PTPL_MASK" 12
.IP "NVME_FEAT_CDP_CHPS" 12
Change Personality Settings (Set Features
Command Dword 13 only)
.IP "NVME_FEAT_CDP_PERFS" 12
Personality Freeze State (Set Features
Command Dword 13, and Get Features Completion
Queue Entry Dword 0)
.IP "NVME_FEAT_CDP_PERID_SHIFT" 12
Shift amount to set/get the Personality
Identifier (Set Features Command Dword 13, and
Get Features Completion Queue Entry Dword 0)
.IP "NVME_FEAT_CDP_PERID_MASK" 12
Mask to set/get the Personality Identifier
.IP "NVME_FEAT_CDP_PMDSS" 12
Personality Manufacturing Default Settings
State (Get Features Completion Queue Entry
Dword 0 only)
.IP "NVME_FEAT_CDP_PPSC" 12
Pending Personality Settings Change (Get
Features Completion Queue Entry Dword 0 only)
.IP "NVME_FEAT_POWER_LIMIT_PLV_SHIFT" 12
.IP "NVME_FEAT_POWER_LIMIT_PLV_MASK" 12
.IP "NVME_FEAT_POWER_LIMIT_PLS_SHIFT" 12
.IP "NVME_FEAT_POWER_LIMIT_PLS_MASK" 12
.IP "NVME_FEAT_POWER_THRESH_PTV_SHIFT" 12
.IP "NVME_FEAT_POWER_THRESH_PTV_MASK" 12
.IP "NVME_FEAT_POWER_THRESH_PTS_SHIFT" 12
.IP "NVME_FEAT_POWER_THRESH_PTS_MASK" 12
.IP "NVME_FEAT_POWER_THRESH_PMTS_SHIFT" 12
.IP "NVME_FEAT_POWER_THRESH_PMTS_MASK" 12
.IP "NVME_FEAT_POWER_THRESH_EPT_SHIFT" 12
.IP "NVME_FEAT_POWER_THRESH_EPT_MASK" 12
.IP "NVME_FEAT_POWER_MEAS_ACT_SHIFT" 12
.IP "NVME_FEAT_POWER_MEAS_ACT_MASK" 12
.IP "NVME_FEAT_POWER_MEAS_PMTS_SHIFT" 12
.IP "NVME_FEAT_POWER_MEAS_PMTS_MASK" 12
.IP "NVME_FEAT_POWER_MEAS_SMT_SHIFT" 12
.IP "NVME_FEAT_POWER_MEAS_SMT_MASK" 12
.IP "NVME_FEAT_VOLTAGE_THRESHOLD_UVT_SHIFT" 12
Shift amount to set/get the
Undervoltage Threshold (UVT)
.IP "NVME_FEAT_VOLTAGE_THRESHOLD_UVT_MASK" 12
Mask to set/get UVT
.IP "NVME_FEAT_VOLTAGE_THRESHOLD_OVT_SHIFT" 12
Shift amount to set/get the
Overvoltage Threshold (OVT)
.IP "NVME_FEAT_VOLTAGE_THRESHOLD_OVT_MASK" 12
Mask to set/get OVT
.IP "NVME_FEAT_VOLTAGE_THRESHOLD_EVT" 12
Enable Voltage Threshold
.IP "NVME_FEAT_VOLTAGE_THRESHOLD_VSENS_SHIFT" 12
Shift amount to set/get the
Voltage Sensor Select (VSENS),
see \fIenum nvme_voltage_sensor\fP
.IP "NVME_FEAT_VOLTAGE_THRESHOLD_VSENS_MASK" 12
Mask to set/get VSENS
.IP "NVME_FEAT_VOLTAGE_MEASUREMENT_ACT_SHIFT" 12
Shift amount to set the
Action (ACT), see \fIenum
nvme_voltage_measurement_act\fP
.IP "NVME_FEAT_VOLTAGE_MEASUREMENT_ACT_MASK" 12
Mask to set ACT
.IP "NVME_FEAT_RATE_LIMITING_TID_SHIFT" 12
Shift amount to set/get the Target
Identifier (TID)
.IP "NVME_FEAT_RATE_LIMITING_TID_MASK" 12
Mask to set/get TID
.IP "NVME_FEAT_RATE_LIMITING_TGT_SHIFT" 12
Shift amount to set/get the Target
(TGT), see \fIenum nvme_rate_limiting_target\fP
.IP "NVME_FEAT_RATE_LIMITING_TGT_MASK" 12
Mask to set/get TGT