libnvme(9) API Manual libnvme(9)

# [NAME](#NAME)

enum nvme\_register\_offsets - controller registers for all transports. This is the layout of BAR0/1 for PCIe, and properties for fabrics.

# [SYNOPSIS](#SYNOPSIS)

enum nvme\_register\_offsets {  
**NVME\_REG\_CAP** ,  
**NVME\_REG\_VS** ,  
**NVME\_REG\_INTMS** ,  
**NVME\_REG\_INTMC** ,  
**NVME\_REG\_CC** ,  
**NVME\_REG\_CSTS** ,  
**NVME\_REG\_NSSR** ,  
**NVME\_REG\_AQA** ,  
**NVME\_REG\_ASQ** ,  
**NVME\_REG\_ACQ** ,  
**NVME\_REG\_CMBLOC** ,  
**NVME\_REG\_CMBSZ** ,  
**NVME\_REG\_BPINFO** ,  
**NVME\_REG\_BPRSEL** ,  
**NVME\_REG\_BPMBL** ,  
**NVME\_REG\_CMBMSC** ,  
**NVME\_REG\_CMBSTS** ,  
**NVME\_REG\_CMBEBS** ,  
**NVME\_REG\_CMBSWTP** ,  
**NVME\_REG\_NSSD** ,  
**NVME\_REG\_CRTO** ,  
**NVME\_REG\_PMRCAP** ,  
**NVME\_REG\_PMRCTL** ,  
**NVME\_REG\_PMRSTS** ,  
**NVME\_REG\_PMREBS** ,  
**NVME\_REG\_PMRSWTP** ,  
**NVME\_REG\_PMRMSCL** ,  
**NVME\_REG\_PMRMSCU**

};

# [Constants](#Constants)

[NVME\_REG\_CAP](#NVME_REG_CAP)

Controller Capabilities

[NVME\_REG\_VS](#NVME_REG_VS)

Version

[NVME\_REG\_INTMS](#NVME_REG_INTMS)

Interrupt Mask Set

[NVME\_REG\_INTMC](#NVME_REG_INTMC)

Interrupt Mask Clear

[NVME\_REG\_CC](#NVME_REG_CC)

Controller Configuration

[NVME\_REG\_CSTS](#NVME_REG_CSTS)

Controller Status

[NVME\_REG\_NSSR](#NVME_REG_NSSR)

NVM Subsystem Reset

[NVME\_REG\_AQA](#NVME_REG_AQA)

Admin Queue Attributes

[NVME\_REG\_ASQ](#NVME_REG_ASQ)

Admin SQ Base Address

[NVME\_REG\_ACQ](#NVME_REG_ACQ)

Admin CQ Base Address

[NVME\_REG\_CMBLOC](#NVME_REG_CMBLOC)

Controller Memory Buffer Location

[NVME\_REG\_CMBSZ](#NVME_REG_CMBSZ)

Controller Memory Buffer Size

[NVME\_REG\_BPINFO](#NVME_REG_BPINFO)

Boot Partition Information

[NVME\_REG\_BPRSEL](#NVME_REG_BPRSEL)

Boot Partition Read Select

[NVME\_REG\_BPMBL](#NVME_REG_BPMBL)

Boot Partition Memory Buffer Location

[NVME\_REG\_CMBMSC](#NVME_REG_CMBMSC)

Controller Memory Buffer Memory Space Control

[NVME\_REG\_CMBSTS](#NVME_REG_CMBSTS)

Controller Memory Buffer Status

[NVME\_REG\_CMBEBS](#NVME_REG_CMBEBS)

Controller Memory Buffer Elasticity Buffer Size

[NVME\_REG\_CMBSWTP](#NVME_REG_CMBSWTP)

Controller Memory Buffer Sustained Write Throughput

[NVME\_REG\_NSSD](#NVME_REG_NSSD)

NVM Subsystem Shutdown

[NVME\_REG\_CRTO](#NVME_REG_CRTO)

Controller Ready Timeouts

[NVME\_REG\_PMRCAP](#NVME_REG_PMRCAP)

Persistent Memory Capabilities

[NVME\_REG\_PMRCTL](#NVME_REG_PMRCTL)

Persistent Memory Region Control

[NVME\_REG\_PMRSTS](#NVME_REG_PMRSTS)

Persistent Memory Region Status

[NVME\_REG\_PMREBS](#NVME_REG_PMREBS)

Persistent Memory Region Elasticity Buffer Size

[NVME\_REG\_PMRSWTP](#NVME_REG_PMRSWTP)

Memory Region Sustained Write Throughput

[NVME\_REG\_PMRMSCL](#NVME_REG_PMRMSCL)

Persistent Memory Region Controller Memory Space Control Lower

[NVME\_REG\_PMRMSCU](#NVME_REG_PMRMSCU)

Persistent Memory Region Controller Memory Space Control Upper

enum nvme\_register\_offsets October 2026

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Document: nvme_register_offsets-libnvme3(2) from nvme-cli 3.2-r0 (Chainguard OS)
Source: https://github.com/linux-nvme/nvme-cli