DS28E04(3)

latch.0 latch.1 latch.ALL latch.BYTE

read-write, binary
The 2 pins (PIO) latch a bit when their state changes, either externally, or through a write to the pin.
Reading the latch property indicates that the latch has been set.
Writing any data to ANY latch will reset them all. (This is the hardware design).
ALL is all latch states, accessed simultaneously, comma separated.
BYTE references all channels simultaneously as a single byte. Channel 0 is bit 0.

PIO.0 PIO.1 PIO.ALL PIO.BYTE

read-write, yes-no
State of the open-drain output ( PIO ) pin. 0 = non-conducting = off, 1 = conducting = on.
Writing zero will turn off the switch, non-zero will turn on the switch. Reading the PIO state will return the switch setting. To determine the actual logic level at the switch, refer to the sensed.0 sensed.1 sensed.ALL sensed.BYTE property.
ALL references all channels simultaneously, comma separated.
BYTE references all channels simultaneously as a single byte. Channel 0 is bit 0.

power

read-only, yes-no
Is the DS28E04 powered parasitically (=0) or separately on the Vcc pin (=1)?

sensed.0 sensed.1 sensed.ALL sensed.BYTE

read-only, yes-no
Logic level at the PIO pin. 0 = ground. 1 = high (~2.4V - 5V ). Really makes sense only if the PIO state is set to zero (off), else will read zero.
ALL references all channels simultaneously, comma separated.
BYTE references all channels simultaneously as a single byte. Channel 0 is bit 0.

polarity

read-only, yes-no
Reports the state of the POL pin. The state of the POL pin specifies whether the PIO pins P0 and P1 power up high or low. The polarity of a pulse generated at a PIO pin is the opposite of the pin's power-up state.

0

PIO powers up 0

1

PIO powers up 1

por

read-write, yes-no
Specifies whether the device has performed power-on reset. This bit can only be cleared to 0 under software control. As long as this bit is 1 the device will always respond to a conditional search.

set_alarm

read-write, integer unsigned (0-333)
A number consisting of 3 digits XYY, where:

X

select source and logical term
0 PIO OR
1 latch OR
2 PIO AND
3 latch AND

Y

select channel and polarity
0 Unselected (LOW)
1 Unselected (HIGH)
2 Selected LOW
3 Selected HIGH

All digits will be truncated to the 0-3 range. Leading zeroes are optional. Low-order digit is channel 0.

Example:

133

Responds on Conditional Search when latch.1 or latch.0 are set to 1.

222

Responds on Conditional Search when sensed.1 and sensed.0 are set to 0.

000 (0)

Never responds to Conditional Search.

DS28E04

The DS28E04 (3) is a memory chip that bends the unique addressing capabilities of the 1-wire design. Some of the ID bits can be assigned by hardware.