RZ\_ASM(1) General Commands Manual RZ\_ASM(1)

# [NAME](#NAME)

`rz-asm` — rizin assembler and disassembler tool

# [SYNOPSIS](#SYNOPSIS)

`rz-asm` \[`-ABCdDeIEhjLpqrvxw`] \[`-a` `arch`] \[`-b` `bits`] \[`-m` `plugin`] \[`-c` `CPU`] \[`-O` `file`] \[`-o` `addr`] \[`-@` `addr`] \[`-f` `file`] \[`-F` `in:out`] \[`-i` `len`] \[`-k` `kernel`] \[`-s` `syntax`] \[`-l` `len`]

# [DESCRIPTION](#DESCRIPTION)

This command is part of the Rizin project.

This tool uses RzAsm to assemble and disassemble files or hexpair strings. It supports a large list of architectures which can be listed using the `-L` flag.

[`-a`](#a) `arch`

Set architecture to assemble/disassemble (see -L)

[`-A`](#A)

Show analysis information from given hexpairs

[`-b`](#b) `bits`

Set CPU register size (8, 16, 32, 64) (RZ\_ASM\_BITS)

[`-B`](#B)

Binary input/output (-l is mandatory for binary input)

[`-c`](#c) `CPU`

Select specific CPU (depends on the arch)

[`-C`](#C)

Output in C format

[`-d`](#d), `-D`

Disassemble from hexpair bytes (-D show hexpairs)

[`-e`](#e)

Use big endian instead of little endian

[`-I`](#I)

Display lifted RzIL code (same input as in -d, IL is also validated)

[`-E`](#E)

Display ESIL expression (same input as in -d)

[`-f`](#f) `file`

Read data from file

[`-F`](#F) `in:out`

Specify input and/or output filters (att2intel, x86.pseudo, ...)

[`-h`](#h), `-hh`

Show usage help message, hh for long

[`-i`](#i) `len`

Ignore N bytes of the input buffer

[`-j`](#j)

Output in JSON format

[`-k`](#k) `kernel`

Select operating system (linux, windows, darwin, ..)

[`-l`](#l) `len`

Input/Output length

[`-L`](#L)

List asm plugins: (a=asm, d=disasm, A=analyze, e=ESIL, I=RzIL)

[`-m`](#m) `plugin`

List supported CPUs for the chosen plugin

[`-o`](#o), `-@` `addr`

Set start address for code (default 0)

[`-O`](#O) `file`

Output file name (rz-asm -Bf a.asm -O a)

[`-p`](#p)

Run SPP over input for assembly

[`-q`](#q)

Quiet mode

[`-s`](#s) `syntax`

Select syntax (intel, att)

[`-v`](#v)

Show version information

[`-x`](#x)

Use hex dwords instead of hex pairs when assembling

[`-w`](#w)

Describe opcode

# [Directives](#Directives)

[`.intel_syntax`](#.intel_syntax)

Use Intel syntax rather than AT&T

[`.att_syntax`](#.att_syntax)

Use AT&T syntax rather than Intel

[`.align`](#.align) `number`

Set the code or data alignment

[`.arch`](#.arch) `name`

Set the code architecture

[`.arm`](#.arm)

Set the ARM mode (as opposed to Thumb) for ARM architecture

[`.ascii`](#.ascii) `string`

Define the ASCII string

[`.asciz`](#.asciz) `string`

Define the zero-ending ASCII string

[`.bits`](#.bits) `number`

Define the code bitness

[`.big_endian`](#.big_endian)

Set the BE (big endian) byte order

[`.cpu`](#.cpu) `name`

Set the CPU for the chosen architecture

[`.data`](#.data)

Mark the start of the data section

[`.endian`](#.endian) `1|0`

Set the endianness (the byte order) - 1 is BE, 0 is LE

[`.equ`](#.equ) `name` `value`

Define the constant

[`.fill`](#.fill) `repeat,size,value`

Fill the data with the repeating value pattern

[`.hex`](#.hex) `data`

Define the data in hexadecimal format

[`.incbin`](#.incbin) `filename`

Include binary file

[`.int16`](#.int16) `number`

Define 16-bit integer

[`.int32`](#.int32) `number`

Define 32-bit integer

[`.int64`](#.int64) `number`

Define 64-bit integer

[`.kernel`](#.kernel) `name`

Set the kernel for syscalls

[`.little_endian`](#.little_endian)

Set the LE (little endian) byte order

[`.org`](#.org) `value`

Set the value of the PC (Program Counter) register

[`.os`](#.os) `name`

Set the operating system for syscalls

[`.short`](#.short) `number`

Define 16-bit integer

[`.string`](#.string) `string`

Define the ASCII string

[`.text`](#.text)

Mark the start of the text section

[`.thumb`](#.thumb)

Set the Thumb mode (as opposed to ARM) for ARM architecture

# [ENVIRONMENT](#ENVIRONMENT)

RZ\_ARCH: e asm.arch - architecture to assemble or disassemble(same as rz-asm -a)

RZ\_ASM\_ARCH: architecture to assemble/disassemble (same as rz-asm -a)

RZ\_ASM\_BITS: cpu register size (8, 16, 32, 64) (same as rz-asm -b)

RZ\_BITS: e asm.bits - cpu register size (8, 16, 32, 64) (same as rz-asm -b)

RZ\_DEBUG: if defined, show error messages and crash signal0

RZ\_NOPLUGINS: do not load shared plugins (speedup loading)0

# [EXAMPLES](#EXAMPLES)

Assemble opcode: `rz-asm` `-a` `x86` `-b` `32` `'mov eax, 33'`

Disassemble opcode:

`rz-asm` `-d` `90`

# [SEE ALSO](#SEE_ALSO)

[rizin(1)](/man/os/rizin/rizin.1), [rz-ax(1)](/man/os/rizin/rz-ax.1), [rz-bin(1)](/man/os/rizin/rz-bin.1), [rz-diff(1)](/man/os/rizin/rz-diff.1), [rz-find(1)](/man/os/rizin/rz-find.1), [rz-gg(1)](/man/os/rizin/rz-gg.1), [rz-hash(1)](/man/os/rizin/rz-hash.1), [rz-run(1)](/man/os/rizin/rz-run.1)

# [AUTHORS](#AUTHORS)

pancake <pancake@nopcode.org>

byteninjaa0

January 22, 2024 Linux 4.19.0-gvisor

---

Document: rz-asm(1) from rizin 0.9.1-r1 (Chainguard OS)
Source: https://github.com/rizinorg/rizin